Semiconductor package structure and method for manufacturing the same

1. A package structure, comprising:

a substrate;

a first electronic component adjacent to the substrate and having a first active surface;

a second electronic component having a second active surface facing the first active surface of the first electronic component wherein the second electronic component is electrically connected to the first electronic component;

a third electronic component having a third active surface facing the substrate; and

a connection component electrically connecting the third active surface of the third electronic component to the first active surface of the first electronic component,

wherein the connection component has at least two bendings.

2. The package structure of claim 1 , wherein the connection component comprises a redistribution layer (RDL).

3. The package structure of claim 1 , wherein the first electronic component comprises a plurality of pads on the first active surface of the first electronic component and wherein a horizontal distance between the second electronic component and the third electronic component is larger than a pad pitch of the first electronic component.

4. The package structure of claim 1 , wherein the third electronic component is connected to the substrate by a copper pillar.

5. The package structure of claim 1 , wherein the connection component comprises at least one bonding wire, the at least one bonding wire connects the first active surface of the first electronic component to the second active surface of the second electronic component.

6. The package structure of claim 1 , wherein the substrate having a first surface and a second surface opposite the first surface, the first active surface of the first electronic component is exposed from the second surface of the substrate, and the package structure further comprises an insulation layer disposed on the first surface of the substrate.

7. The package structure of claim 6 , wherein the insulation layer includes polyimides.

8. The package structure of claim 1 , wherein the substrate comprises an inner dielectric layer covering the first electronic component.

9. The package structure of claim 1 , wherein the second active surface of the second electronic component is electrically connected to the first active surface of the first electronic component through a copper pillar.

10. The package structure of claim 1 , wherein the second active surface of the second electronic component is electrically connected to the first active surface of the first electronic component through a further connection component and wherein the further connection component has at least two bendings.

11. The package structure of claim 1 , wherein the connection component is connected to a pad, a bump or a pillar disposed on the first active surface of the first electronic component and a pad, a bump or a pillar disposed on the third active surface of the third electronic component.

12. The package structure of claim 1 , wherein the first electronic component comprises a bridge die, an RDL, a semiconductor substrate or a PCB.

13. A package structure, comprising:

a substrate;

a first electronic component adjacent to the substrate and having a first active surface exposed from the substrate and a lateral surface non-coplanar with the first active surface;

a second electronic component having a second active surface facing the substrate and electrically connected to the first active surface of the first electronic component;

a third electronic component having a third active surface facing the substrate; and

a connection component electrically connecting the third active surface of the third electronic component to the first active surface of the first electronic component, wherein a projection of the connection component on the substrate overlaps the lateral surface of the first electronic component.

14. The package structure of claim 13 , wherein the connection component comprises at least one bonding wire or a redistribution layer (RDL).

15. The package structure of claim 13 , wherein the third electronic component is connected to the substrate by a copper pillar.

16. The package structure of claim 13 , wherein the substrate comprises an inner dielectric layer covering the first electronic component.

17. The package structure of claim 13 , wherein the second active surface of the second electronic component is electrically connected to the first active surface of the first electronic component through a further connection component.

18. The package structure of claim 13 , wherein the first electronic component comprises a plurality of pads on the first active surface of the first electronic component and wherein a horizontal distance between the second electronic component and the third electronic component is larger than a pad pitch of the first electronic component.

19. A method for manufacturing a package structure, comprising:

providing a substrate, wherein the substrate comprises a first electronic component having a first active surface exposed from the substrate;

disposing a second electronic component on the substrate, wherein the second electronic component has a second active surface facing away from the substrate;

connecting the second active surface of the second electronic component and the first active surface of the first electronic component using a bonding wire; and

flipping the second electronic component and electrically connecting the second electronic component to the substrate.

20. The method of claim 19 , further comprising:

disposing a third electronic component on the substrate, wherein the third electronic component has a third active surface facing the first active surface of the first electronic component and electrically connected to the first active surface of the first electronic component; and

disposing an encapsulant encapsulating the substrate, the first electronic component, the second electronic component and the third electronic component.