Fine pitch bva using reconstituted wafer with area array accessible for testing
A method for simultaneously making a plurality of microelectronic packages by forming an electrically conductive redistribution structure along with a plurality of microelectronic element attachment regions on a carrier. The attachment regions being spaced apart from one another and overlying the carrier. The method also including the formation of conductive connector elements between adjacent attachment regions. Each connector element having the first or second end adjacent the carrier and the remaining end at a height of the microelectronic element. The method also includes forming an encapsulation over portions of the connector elements and subsequently singulating the assembly. into microelectronic units, each including a microelectronic element. The surface of the microelectronic unit, opposite the redistribution structure, having both the active face of the microelectronic element and the free ends of the connector elements so that both are available for connection with a component external to the microelectronic unit.
1. A method comprising:
providing a carrier with a microelectronic element attachment region at a surface of the carrier;
forming a plurality of electrically conductive connector elements each positioned beyond an end of the attachment region, each connector element having a first end, a second end and an edge surface extending vertically between the first and second ends, the first end of each connector element being adjacent the carrier and the second end of each connector element at a distance greater than 50 microns from the carrier;
coupling a microelectronic element to the attachment region, the microelectronic element having a first face which faces away from the carrier, the microelectronic element having element contacts at the first face;
forming a dielectric encapsulation between adjacent edge surfaces of the connector elements, to thereby form a reconstituted substrate;
after forming the dielectric encapsulation, forming a redistribution structure overlying both the encapsulation and the microelectronic element, the redistribution structure comprising conductive traces electrically coupled with the second ends of the connector elements; and
singulating the reconstituted substrate to form a microelectronic package.
2. The method of claim 1 , wherein the forming of the dielectric encapsulation is performed after the forming of the plurality of electrically conductive connector elements.
3. The method of claim 2 , wherein each connector element comprises copper.
4. The method of claim 2 , further comprising interconnecting the microelectronic package to a printed circuit board using electrically conductive masses.
5. The method of claim 2 , further comprising removing the carrier from the encapsulation and microelectronic element.
6. The method of claim 2 , wherein forming the redistribution structure comprises electrically coupling conductive traces of the redistribution structure with the element contacts.
7. The method of claim 2 , wherein the electrically conductive connector elements are free of direct physical connections to the microelectronic element.
8. The method of claim 2 , wherein forming the plurality of electrically conductive connector elements comprises forming wire bonds attached to conductive pads of a patterned conductive layer.
9. The method of claim 2 , wherein the plurality of electrically conductive connector elements are adjacent opposite ends of the attachment region.
10. The method of claim 2 , wherein the reconstituted substrate comprises a reconstituted wafer.
11. The method of claim 2 , wherein each connector element comprises an electrically conductive post.
12. The method of claim 2 , further comprising joining at least some of the connector elements with solder masses.
13. A microelectronic package having a first side and a second side opposite from the first side, the package comprising:
a microelectronic element having a first face, a second face opposite the first face, a plurality of sidewalls each extending between the first and second faces, and a plurality of element contacts at the first face;
an encapsulation adjacent the sidewalls of the microelectronic element and having a thickness in a direction between the first and second sides of the package;
electrically conductive connector elements each positioned beyond an end of the microelectronic element and each having a first end, a second end remote from the first end, and an edge surface extending between the first and second ends, wherein one of the first end or the second end of each connector element is adjacent the first side of the package, the edge surfaces of the connector elements being contacted by the encapsulation between the first and second ends; and
a redistribution structure comprising electrically conductive traces and overlying both the encapsulation and the microelectronic element, the redistribution structure adjacent the second side of the package, the other of the first end or the second end of each connector element being electrically coupled with the conductive traces of the redistribution structure.
14. The microelectronic package of claim 13 , wherein the microelectronic package is configured to be interconnected to a printed circuit board using electrically conductive masses.
15. The microelectronic package of claim 13 , wherein the electrically conductive traces of the redistribution structure are electrically coupled with the element contacts.
16. The microelectronic package of claim 13 , wherein the electrically conductive connector elements are free of direct physical connections to the microelectronic element.
17. The microelectronic package of claim 13 , wherein the electrically conductive connector elements are positioned adjacent opposite ends of the microelectronic element.
18. The microelectronic package of claim 13 , wherein the encapsulation has a surface overlying and facing away from the redistribution structure, the first end of a given connector element is adjacent the redistribution structure and the second end of a given connector element is at the first side of the package and protrudes beyond the surface of the encapsulation.
19. The microelectronic package of claim 13 , wherein the electrically conductive connector elements are wire bonds.
20. The microelectronic package of claim 13 , wherein each connector element comprises an electrically conductive post.
21. The microelectronic package of claim 13 , further comprising conductive joining masses formed at the first side of the microelectronic package, at least one conductive joining mass configured to electrically couple the microelectronic element to a first external component and at least one conductive joining mass configured to electrically couple the connector element to the first external component.
22. The microelectronic package of claim 13 , wherein each connector element is in contact with a solder mass.
23. The microelectronic package of claim 13 , wherein the encapsulation has a first surface and a second surface opposite the first surface, the direction of the thickness being orthogonal to the first and second surfaces, the first and second surfaces being parallel to the first and second sides of the package, the redistribution structure being adjacent the second surface of the encapsulation.
24. The microelectronic package of claim 13 , wherein each connector element has a length greater than 50 microns between the respective first end and the respective second end.
25. The microelectronic package of claim 13 , wherein each connector element comprises copper.