Event-driven design simulation
An event-driven simulation system is provided. The simulation system classifies events into bypass-events and perform-events. The simulation system performs simulation by executing instructions based on the perform-events and skips simulation for the bypass-events. The simulation system produces partial simulation result data based events that are actually simulated but not the events that are skipped. A post processor is provided to generate the missing simulation result data for the bypass-events and to merge the bypass-event with the partial simulation result to generate a complete simulation result.
1. A method comprising:
receiving, at a first computing device, a testbench for a design of an integrated circuit (IC);
classifying a first type of events scheduled by the testbench as perform-events and a second type of events scheduled by the testbench as bypass-events;
configuring a second computing device to perform event-based simulation of the testbench based on the first type of events;
receiving a first simulation result data from the second computing device based on the simulation of the first type of events; and
generating a second simulation result data for the second type of events by extrapolating from the first simulation result data.
2. The method of claim 1 , wherein configuring the second computing device comprises compiling the testbench to generate (i) a set of instructions that are executable at the second computing device for performing event-driven simulation for a first set of simulation time steps and (ii) a configuration for configuring the second computing device to block event-driven simulation based on the second type of events.
3. The method of claim 1 , wherein the testbench comprises a clock signal that generates both the first and second types of events, wherein the second computing device is configured to simulate the first type of events for the clock signal but not the second type of events for the clock signal.
4. The method of claim 1 , wherein the first type of events is a rising edge of a clock signal and the second type of events is a falling edge of the clock signal.
5. The method of claim 1 , wherein said classifying comprises identifying a fan-out of the first type of events a fan-out of the second type of events.
6. The method of claim 1 , wherein said classifying comprises classifying events scheduled by a particular module in the testbench as bypass-events.
7. The method of claim 1 , wherein said classifying comprises identifying events that do not affect the simulation result of subsequent time steps as bypass-events.
8. The method of claim 1 , wherein the second computing device is configured to perform event-based simulation of the testbench based on the first type of events without using the second type of events.
9. An electronic device comprising one or more integrated circuits (IC) configured to perform operations comprising:
receiving a testbench for a design of an integrated circuit (IC);
classifying a first type of events scheduled by the testbench as perform-events and a second type of events scheduled by the testbench as bypass-events;
configuring a particular computing device to perform event-based simulation of the testbench based on the first type of events;
receiving a first simulation result data from the particular computing device based on the simulation of the first type of events; and
generating a second simulation result data for the second type of events by extrapolating from the first simulation result data.
10. The electronic device of claim 9 , wherein configuring the particular computing device comprises compiling the testbench to generate (i) a set of instructions that are executable at the particular computing device for performing event-driven simulation for a first set of simulation time steps and (ii) a configuration for configuring the particular computing device to block event-driven simulation based on the second type of events.
11. The electronic device of claim 9 , wherein the testbench comprises a clock signal that generates both the first and second types of events, wherein the particular computing device is configured to simulate the first type of events for the clock signal but not the second type of events for the clock signal.
12. The electronic device of claim 9 , wherein the first type of events is a rising edge of a clock signal and the second type of events is a falling edge of the clock signal.
13. The electronic device of claim 9 , wherein said classifying comprises identifying a fan-out of the first type of events a fan-out of the second type of events.
14. The electronic device of claim 9 , wherein said classifying comprises classifying events scheduled by a particular module in the testbench as bypass-events.
15. The electronic device of claim 9 , wherein said classifying comprises identifying events that do not affect the simulation result of subsequent time steps as bypass-events.
16. The electronic device of claim 9 , wherein the particular computing device is configured to perform event-based simulation of the testbench based on the first type of events without using the second type of events.