IP Library Granted Patent US 11,527,406
Granted Patent B2
US 11,527,406 · App. 16/742,433 · Granted Dec 13, 2022

Trench etching process for photoresist line roughness improvement

Inventors: Sheng-Lin Hsieh (Hsinchu, TW); I-Chih Chen (Tainan, TW); Ching-Pei Hsieh (Kaohsiung, TW); Kuan Jung Chen (Hsinchu, TW)
Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.; TSMC NANJING COMPANY, LIMITED
H01L21/0276H01L21/0332H01L21/0337H01L21/76816H01L21/76819
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Quick Facts
Patent No.
US 11,527,406
App. No.
16/742,433
Granted
Dec 13, 2022
Kind
B2
Abstract

A method of forming a semiconductor device structure is provided. The method includes forming a resist structure over a substrate. The resist structure includes an anti-reflective coating (ARC) layer and a photoresist layer over the ARC layer. The method further includes patterning the photoresist layer to form a trench therein. The method further includes performing a hydrogen plasma treatment to the patterned photoresist layer. The hydrogen plasma treatment is configured to smooth sidewalls of the trench without etching the ARC layer. The method further includes patterning the ARC layer using the patterned photoresist layer as a etch mask.

Claims (44)

1. A method of forming a semiconductor device structure, comprising:

receiving a substrate;

forming an inter-layer dielectric (ILD) layer over the substrate;

forming a hard mask layer over the ILD layer;

forming a first resist structure over the substrate, the first resist structure comprising a first organic planarization layer (OPL), a first anti-reflective coating (ARC) layer over the first OPL and a first photoresist layer over the first ARC layer;

patterning the first photoresist layer to form a first pattern comprising a plurality of first trenches therein;

performing a first hydrogen plasma treatment to the patterned first photoresist layer, wherein the first hydrogen plasma treatment is configured to smooth sidewalls of the plurality of first trenches;

transferring the first pattern into the first ARC layer and the first OPL;

transferring the first pattern into the hard mask layer to form a plurality of second trenches in the hard mask layer;

forming a second resist structure over the patterned hard mask layer and in the plurality of second trenches, the second resist structure comprising a second OPL, a second ARC layer over the second OPL and a second photoresist layer over the second ARC layer;

patterning the second photoresist layer to form a second pattern comprising a plurality of third trenches therein;

performing a second hydrogen plasma treatment to the patterned second photoresist layer, wherein the second hydrogen plasma treatment is configured to smooth sidewalls of the plurality of third trenches;

transferring the second pattern into the second ARC layer and the second OPL layer;

transferring the second pattern into the patterned hard mask layer to form a plurality of fourth trenches in the patterned hard mask layer, wherein each of the plurality of fourth trenches is disposed between two adjacent second trenches of the plurality of second trenches; and

patterning the ILD layer using the patterned hard mask layer as an etch mask.

2. The method of claim 1 , wherein performing the first hydrogen plasma treatment and the performing the second hydrogen plasma treatment comprise using a process gas comprising a hydrogen gas and a carrier gas.

3. The method of claim 2 , wherein the carrier gas comprises nitrogen, argon, helium, or a mixture thereof.

4. The method of claim 1 , wherein the first hydrogen plasma treatment and the second hydrogen plasma treatment are independently performed at a temperature ranging from about 200° C. to 600° C.

5. The method of claim 1 , wherein the first hydrogen plasma treatment and the the second hydrogen plasma treatment are independently performed under a pressure ranging from about 5 millitorr (mT) to about 20 mT.

6. The method of claim 1 , wherein the first hydrogen plasma treatment and the second hydrogen plasma treatment are independently performed by a power ranging from about 400 W to about 1000 W.

7. The method of claim 1 , wherein a pitch between one second trench of the plurality of second trenches and an adjacent fourth trench of the plurality of fourth trenches is from about 30 nm to about 50 nm.

8. The method of claim 1 , wherein a line width roughness of the plurality of first trenches in the first photoresist layer after performing the first hydrogen plasma treatment is from 2 nm to 5 nm.

9. The method of claim 1 , wherein at least one processing parameter of processing parameters in performing the second hydrogen plasma treatment is different from processing parameters in performing the first hydrogen plasma treatment.

10. A method of forming a semiconductor device structure, comprising:

receiving a substrate comprising a plurality of conductive structures;

forming an inter-layer dielectric (ILD) layer over the substrate;

forming a hard mask layer over the ILD layer;

forming a first resist structure over the substrate, the first resist structure comprising a first organic planarization layer (OPL), a first anti-reflective coating (ARC) layer over the first OPL and a first photoresist layer over the first ARC layer;

patterning the first photoresist layer to form a first pattern comprising a plurality of first trenches therein;

performing a first hydrogen plasma treatment to the patterned first photoresist layer, wherein the first hydrogen plasma treatment is configured to improve a line width roughness (LWR) of the patterned first photoresist layer;

transferring the first pattern into the first ARC layer and the first OPL;

transferring the first pattern into the hard mask layer to form a plurality of second trenches in the hard mask layer;

forming a second resist structure over the patterned hard mask layer and in the plurality of the second trenches, the second resist structure comprising a second OPL, a second ARC layer over the second OPL and a second photoresist layer over the second ARC layer;

patterning the second photoresist layer to form a second pattern comprising a plurality of third trenches therein;

performing a second hydrogen plasma treatment to the patterned second photoresist layer, wherein the second hydrogen plasma treatment is configured to improve a line width roughness of the patterned second photoresist layer;

transferring the second pattern into the second ARC layer and the second OPL layer;

transferring the second pattern into the patterned hard mask layer to form a plurality of fourth trenches in the patterned hard mask layer, wherein each of the plurality of fourth trenches is disposed between two adjacent second trenches of the plurality of second trenches;

patterning the ILD layer using the patterned hard mask layer as an etch mask to form a plurality of interconnect openings therein; and

forming a plurality of interconnect structures in the plurality of interconnect openings, wherein the plurality of interconnect structures contact the plurality of conductive structures.

11. The method of claim 10 , wherein performing the first hydrogen plasma treatment and performing the second hydrogen plasma treatment comprise using a process gas comprising a hydrogen gas and a carrier gas.

12. The method of claim 10 , wherein forming the hard mask layer comprises:

forming a bottom hard mask layer over the ILD layer;

forming a middle hard mask layer over the bottom hard mask layer; and

forming a top hard mask layer over the middle hard mask layer, wherein the plurality of second trenches and the plurality of fourth trenches are formed in the top hard mask layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 14, 2020
From: HSIEH, SHENG-LIN; CHEN, I-CHIH; HSIEH, CHING-PEI; CHEN, KUAN JUNG
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.; TSMC NANJING COMPANY, LIMITED
Reel/Frame 051511/0586 →
Priority Claims (1)
CN 201911270313.8 · Dec 11, 2019 · national
Continuity (1)
Related Publication 20210183644A1 · Jun 17, 2021
Cited By (1)
US 12,463,035