Semiconductor devices and methods of manufacturing semiconductor devices

1. A method, comprising:

providing a subpanel substrate on a subpanel base, the subpanel substrate comprising a dielectric structure and a conductive structure, wherein the subpanel substrate comprises a singulated portion of a panel substrate, and wherein an outermost perimeter of the subpanel substrate is flush with an outermost perimeter of the subpanel base;

providing:

a first electronic component on a first side of the subpanel substrate and electrically coupled to a first portion of the conductive structure, and

a second electronic component on the first side of the subpanel substrate and electrically coupled to a second portion of the conductive structure;

removing the subpanel base;

providing:

a first external interconnect on a second side of the subpanel substrate and electrically coupled to the first portion of the conductive structure, and

a second external interconnect on the second side of the subpanel substrate and electrically coupled to the second portion of the conductive structure;

and

singulating the subpanel substrate to provide individual unit substrates;

wherein the subpanel base is removed after the first electronic component and the second electronic component are provided, and before the first external interconnect and the second external interconnect are provided; and

wherein the panel substrate is singulated in a first singulation operation into the singulated portion of the panel substrate prior to providing the first electronic component and the second electronic component and prior to singulating the subpanel substrate into the individual unit substrates in a second singulation operation, wherein the first singulation operation includes singulating through the subpanel base.

2. The method of claim 1 , further comprising providing a subpanel body on a top side of the subpanel substrate contacting a lateral side of the first electronic component and a lateral side of the second electronic component.

3. The method of claim 1 , further comprising providing a first metal lid on a top side of the subpanel substrate over the first electronic component and electrically coupled to the first portion of the conductive structure, and a second metal lid on the top side of the subpanel substrate over the second electronic component and electrically coupled to the second portion of the conductive structure, wherein the first metal lid contacts a top side of the first electronic component via thermally conductive adhesive, and the second metal lid contacts a top side of the second electronic component via thermally conductive adhesive.

4. The method of claim 1 , further comprising providing a first cover on a top side of the subpanel substrate over the first electronic component, and a second cover on the top side of the subpanel substrate over the second electronic component, wherein the first cover and the second cover comprise a dielectric material, wherein the first cover contacts a top side of the first electronic component via thermally conductive adhesive, and the second cover contacts a top side of the second electronic component via thermally conductive adhesive.

5. The method of claim 1 , wherein subpanel substrate has a strip array form factor.

6. The method of claim 1 , wherein the subpanel base is fixed to the second side of the subpanel substrate via an adhesive.

7. The method of claim 6 , further comprising removing the subpanel base prior to providing the first external interconnect and the second external interconnect.

8. The method of claim 1 , further comprising:

providing a support carrier on the second side of the subpanel substrate;

providing a subpanel body on the individual unit substrates and on the support carrier, the subpanel body contacting a lateral side of the first electronic component and the second electronic component; and

removing the support carrier.

9. The method of claim 8 , wherein the subpanel body contacts a side of the individual unit substrates.

10. The method of claim 8 , wherein the first electronic component or the second electronic component are exposed through the subpanel body.

11. The method of claim 8 , wherein the subpanel substrate comprises a bottom encapsulant on a bottom side of the subpanel substrate, and the bottom encapsulant contacts a lateral side of the first and second external interconnects.

12. The method of claim 8 , wherein the support carrier is removed after singulating the subpanel substrate.

13. The method of claim 1 , wherein the subpanel base is removed before providing the first electronic component and the second electronic component on the first side of the individual unit substrates.

14. A method comprising:

receiving a first subpanel substrate on a first subpanel base, wherein the first subpanel substrate comprises a singulated portion of a panel substrate, and wherein an outermost perimeter of the first subpanel substrate is coplanar with an outermost perimeter of the first subpanel base, the first subpanel substrate comprising:

a subpanel dielectric structure;

a subpanel conductive structure coupled with the subpanel dielectric structure;

a first unit substrate comprising:

a first unit conductive structure comprising a first portion of the subpanel conductive structure; and

a first unit dielectric structure comprising a first portion of the subpanel dielectric structure;

a second unit substrate electrically coupled with the first unit substrate and comprising:

a second unit conductive structure comprising a second portion of the subpanel conductive structure; and

a second unit dielectric structure comprising a second portion of the subpanel dielectric structure;

coupling a first electronic component with the first unit substrate;

coupling a second electronic component with the second unit substrate;

removing the first subpanel base; and

singulating semiconductor devices from the first subpanel substrate, the semiconductor devices comprising:

a first semiconductor device comprising the first unit substrate and the first electronic component; and

a second semiconductor device comprising the second unit substrate and the second electronic component;

wherein the first subpanel base is removed after the first electronic component is coupled with the first unit substrate and the second electronic component is coupled with the second unit substrate; and

wherein the panel substrate is singulated in a first singulation operation into the singulated portion of the panel substrate prior to coupling the first electronic component and the second electronic component and prior to singulating the first semiconductor device and the second semiconductor device from the first subpanel substrate in a second singulation operation, wherein the first singulation operation includes singulating through the first subpanel base.

15. The method of claim 14 , wherein:

a temporary adhesive between the first subpanel base and the first subpanel substrate is photo-releasable; and

removing the first subpanel base comprises degrading adhesion of the temporary adhesive by exposure to light.

16. The method of claim 14 , comprising:

receiving a panel substrate on a panel base,

the panel base comprising:

the first subpanel base; and

a second subpanel base integral with the first subpanel base;

the panel substrate comprising:

the first subpanel substrate on the first subpanel base; and

a second subpanel substrate on the second subpanel base and electrically coupled with the first subpanel substrate;

and, prior to coupling the first electronic component:

singulating the first subpanel base and the first subpanel substrate from the panel base and the panel substrate.

17. The method of claim 16 , wherein:

the first subpanel substrate comprises a wafer form-factor; and

the panel substrate comprises a rectangular area having a side dimension of at least 400 mm.

18. The method of claim 16 , wherein:

the panel substrate comprises an upper dielectric layer on the panel base;

the first subpanel substrate comprises a first portion of the upper dielectric layer;

the second subpanel substrate comprises a second portion of the upper dielectric layer; and

the first and second portions of the upper dielectric layer are continuous without a gap between the first and second subpanel substrates.

19. The method of claim 14 , wherein:

the first subpanel substrate comprises a strip array form-factor; and

the panel substrate comprises a rectangular area having a side dimension of at least 400 mm.

20. A method, comprising:

singulating a panel substrate formed on a panel base to provide a singulated subpanel substrate on a subpanel base, wherein an outermost perimeter of the singulated subpanel substrate is flush with an outermost perimeter of the subpanel base;

providing a unit substrate comprising a unit conductive structure and a unit dielectric structure, and an electronic component coupled to the unit conductive structure; and

removing the subpanel base;

wherein the unit substrate comprises a portion of the singulated subpanel substrate of the panel substrate;

wherein the subpanel base is removed after the electronic component is coupled with the unit substrate; and

wherein the panel substrate is singulated in a first singulation operation into the singulated subpanel substrate prior to providing the electronic component and prior to singulating the singulated subpanel substrate into the unit substrate in a second singulation operation, wherein the first singulation operation includes singulating through the subpanel base.

21. The method of claim 20 , wherein:

the singulated subpanel substrate comprises a subpanel conductive structure; and

the subpanel conductive structure comprises the unit conductive structure.