Dynamic random access device including two-dimensional array of fin structures
A method may include providing a substrate, the substrate comprising a substrate base and a patterning stack, disposed on the substrate base. The substrate may include first linear structures in the patterning stack, the first linear structures being elongated along a first direction; and second linear structures in the patterning stack, the second linear structures being elongated along a second direction, the second direction forming a non-zero angle with respect to the first direction. The method may also include selectively forming a set of sidewall spacers on one set of sidewalls of the second linear structures.
1. A device structure, comprising:
a substrate base, the substrate base including an isolation pattern defining a two-dimensional array of fin structures, wherein the two-dimensional array of fin structures is a same homogeneous material as the substrate base, wherein the two-dimensional array of fin structures further comprises a first set of linear trenches and a second set of linear trenches each not exhibiting sidewall roughness, wherein a trench width of the first and second sets of linear trenches is 20 nm or less, wherein the first set of linear trenches extends in a first direction, wherein the second set of linear trenches extends in a second direction, wherein the first direction intersects the second direction, wherein a first depth of the first set of linear trenches is greater than a second depth of the second set of linear trenches, wherein a first width of the first set of linear trenches is greater than a second width of the second set of linear trenches, and wherein a top surface of a first plurality of fin structures of the two-dimensional array of fin structures defining the first set of linear trenches is coplanar with a top surface of a second plurality of fin structures of the two-dimensional array of fin structures defining the second set of linear trenches.
2. The device structure of claim 1 ,
wherein an angle formed between the first direction and the second direction is between 1 and 89 degrees, wherein the first and second sets of linear trenches have an aspect ratio having a value of 15 or more, and wherein the aspect ratio equals a trench depth divided by the trench width.
3. A semiconductor device, comprising:
a substrate base comprising a two-dimensional array of fin structures separated by linear trenches, wherein the two-dimensional array of fins structures is a same homogeneous material as the substrate base, wherein the linear trenches comprises:
a first set of linear trenches formed in the substrate base, the first set of linear trenches extending in a first direction, wherein the first set of linear trenches has a first depth and a first width; and
a second set of linear trenches formed in the substrate base, the second set of linear trenches extending in a second direction, wherein the first direction intersects the second direction, wherein an angle formed between the first direction and the second direction is greater than 0 degrees and less than 90 degrees, wherein a trench width of the linear trenches is 20 nm or less; wherein the second set of linear trenches has a second depth and a second width, wherein the first depth is greater than the second depth, wherein the first width is greater than the second width, and wherein a top surface of a first plurality of fin structures of the two-dimensional array of fin structures defining the first set of linear trenches is coplanar with a top surface of a second plurality of fin structures of the two-dimensional array of fin structures defining the second set of linear trenches; and
an insulator formed in the linear trenches.
4. The semiconductor device of claim 3 , wherein the first and second sets of linear trenches of the two-dimensional array of fin structures comprises an aspect ratio having a value of 15 or more, and wherein the aspect ratio equals a trench depth divided by the trench width.
5. The semiconductor device of claim 3 , further comprising a set of gates formed in trench regions of the two-dimensional array of fin structures.
6. The semiconductor device of claim 3 , wherein the
first set of linear structures form a first array of mutually parallel lines and wherein the second set of linear structures form a second array of mutually parallel lines, and wherein the first array of mutually parallel lines are oriented at a non-zero angle with respect to the second array of mutually parallel lines.
7. The semiconductor device of claim 6 , wherein the non-zero angle is less than 90 degrees.
8. The semiconductor device of claim 3 , wherein the insulator is recessed below a top surface of the two-dimensional array of fin structures.
9. A trench isolation structure, comprising:
a substrate base comprising a two-dimensional array of fin structures separated by a first set of linear trenches and a second set of linear trenches, the first set of linear trenches extending in a first direction and the second set of linear trenches extending in a second direction, wherein the first direction intersects the second direction, wherein an angle formed between the first direction and the second direction is greater than 0 and less than 90 degrees, wherein a trench width of the first set of linear trenches is greater than a trench width of the second set of linear trenches, wherein a trench depth of the first set of linear trenches is greater than a trench depth of the second set of linear trenches, wherein the two-dimensional array of fin structures is a same homogeneous material as the substrate base, and wherein a top surface of a first plurality of fin structures of the two-dimensional array of fin structures defining the first set of linear trenches is coplanar with a top surface of a second plurality of fin structures of the two-dimensional array of fin structures defining the second set of linear trenches; and
an insulator formed in the first and second sets of linear trenches.
10. The trench isolation structure of claim 9 , wherein the first and second sets of linear trenches of the two-dimensional array of fin structures each comprises an aspect ratio having a value of 15 or more, and wherein the aspect ratio equals a trench depth divided by the trench width.
11. The trench isolation structure of claim 9 , further comprising a set of gates formed in trench regions.
12. The trench isolation structure of claim 9 , wherein the
first set of linear structures form a first array of mutually parallel lines and wherein the second set of linear structures form a second array of mutually parallel lines, and wherein the first array of mutually parallel lines are oriented at a non-zero angle with respect to the second array of mutually parallel lines.
13. The trench isolation structure of claim 12 , wherein the non-zero angle is less than 90 degrees.
14. The trench isolation structure of claim 9 , wherein the insulator is recessed below a top surface of the two-dimensional array of fin structures.