Methods and apparatus for programming an integrated circuit using a configuration memory module
View Patent ↗An integrated circuit may include a printed circuit board and multiple processor sockets on the printed circuit board. Each of the multiple processor sockets is operable to receive a microprocessor and a programmable device. When a microprocessor is placed in a processor socket, that microprocessor may communicate with memory dual in-line memory modules (DIMMs). When a programmable device is placed in a processor socket, that programmable device may first be configured using a configuration DIMM and may then communicate with memory DIMMs during normal operation. The configuration DIMM may include multiple options for configuring the programmable device and may also provide additional management functions specifically tailored to the programmable device.
1. Circuitry, comprising:
a circuit board having a first processor socket, a second processor socket, and a slot;
a programmable integrated circuit mounted in the second processor socket; and
a configuration module mounted in the slot, wherein the configuration module configures the programmable integrated circuit.
2. The circuitry of claim 1 , further comprising:
a microprocessor mounted in the first processor socket.
3. The circuitry of claim 1 , wherein the second processor socket is further operable to receive a microprocessor.
4. The circuitry of claim 1 , further comprising:
a memory channel configured to couple the second processor socket to the slot.
5. The circuitry of claim 1 , further comprising:
a processor-to-processor interface configured to couple the first processor socket to the second processor socket.
6. The circuitry of claim 1 , wherein the circuit board further comprises an additional slot configured to receive a memory module.
7. The circuitry of claim 1 , wherein the circuit board further comprises an additional slot configured to receive another configuration module for configuring the programmable integrated circuit.
8. The circuitry of claim 5 , wherein the processor-to-processor interface comprises an UltraPath Interconnect (UPI) interface.
9. The circuitry of claim 6 , wherein the memory module is configured to provide primary storage for the programmable integrated circuit.
10. The circuitry of claim 6 , wherein the configuration module and the memory module have the same form factor.
11. Circuitry, comprising:
a processor socket;
a programmable device mounted in the processor socket; and
a configuration module that programs the programmable device.
12. The circuitry of claim 11 , wherein the configuration module comprises an in-line memory module.
13. The circuitry of claim 11 , wherein the configuration module comprises a dual in-line memory module.
14. The circuitry of claim 11 , further comprising:
an additional processor socket; and
an application-specific integrated circuit (ASIC) processor mounted in the additional processor socket.
15. The circuitry of claim 14 , wherein the programmable device is configured to communicate with the ASIC processor.
16. A configuration module, comprising:
contact leads for coupling to an external programmable circuit; and
means for providing configuration data that is used to program the external programmable circuit, wherein the configuration module comprises an in-line memory module.
17. The configuration module of claim 16 , wherein the means for providing the configuration data comprises configuration memory for storing the configuration data on the configuration module.
18. The configuration module of claim 16 , wherein the means for providing the configuration data comprises a programmable configuration device.
19. The configuration module of claim 16 , wherein the means for providing the configuration data comprises means for relaying the configuration data from an external host to the external programmable circuit.