IP Library Granted Patent US 11,004,394
Granted Patent B2
US 11,004,394 · App. 16/784,693 · Granted May 11, 2021

Display apparatus

Inventors: Kazuyoshi Omata (Tokyo, JP); Hiroyuki Kimura (Tokyo, JP); Makoto Shibusawa (Tokyo, JP); Hiroshi Tabatake (Tokyo, JP)
Assignee: JAPAN DISPLAY INC.
G09G3/325G09G3/2003G09G3/32G09G3/3233G09G3/3258H01L27/3213H01L27/3248H01L27/3262H01L27/3265H01L27/3276H05B33/08H05B45/20H05B45/60G09G2300/0426G09G2300/0452G09G2300/0819G09G2300/0852G09G2300/0861G09G2310/0262G09G2320/0233G09G2320/0252G09G2320/043H01L27/124H01L27/1255
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Quick Facts
Patent No.
US 11,004,394
App. No.
16/784,693
Granted
May 11, 2021
Kind
B2
Abstract

According to one embodiment, a display apparatus includes a plurality of semiconductor layers, a first insulation film, a first conductive layer, a second insulation film and a display element includes a second conductive layer. The first conductive layer and the second conductive layer are opposed to each other to form a capacitance unit.

Claims (28)

1. A TFT array substrate comprising:

a first drive transistor including a gate electrode and a semiconductor layer;

a first electrode electrically connected to a source electrode or a drain electrode of the first drive transistor;

a partition insulation layer covering an edge of the first electrode and including a first opening exposing an upper surface of the first electrode; and

a second conductive layer between the gate electrode of the first drive transistor and the first electrode, wherein

the second conductive layer extends so as not to be in contact with the gate electrode, the source electrode, and the drain electrode of the first drive transistor,

the semiconductor layer of the first drive transistor includes a channel region where the semiconductor layer and the gate electrode are overlapped with each other in a plane view, and

the first opening, the second conductive layer, and the channel region of the first drive transistor are overlapped with each other in the plane view.

2. The TFT array substrate according to claim 1 , further comprising:

a second drive transistor; and

a second electrode adjacent to the first electrode, the second electrode electrically connected to a source electrode or a drain electrode of the second drive transistor, wherein

the partition insulation layer covers an edge of the second electrode and includes a second opening exposing an upper surface of the second electrode,

the second opening and the second conductive layer are overlapped with each other in the plane view, and

the second conductive layer extends below the first opening and the second opening continuously.

3. The TFT array substrate according to claim 1 , further comprising:

a first signal line and a second signal line intersecting the first signal line, wherein

the first signal line is formed in a same layer as the gate electrode of the first drive transistor,

the second signal line extends so as not to be in contact with the first signal line and the second conductive layer, and

the second conductive layer intersects the second signal line.

4. The TFT array substrate according to claim 3 , wherein

the second conductive layer intersects the first signal line.

5. The TFT array substrate according to claim 1 , further comprising:

a power supply line electrically connected to the source electrode or the drain electrode of the first drive transistor; and

an output switch electrically connected between the power supply line and the first drive transistor, wherein

the output switch is configured to select whether to allow or not to allow current flowing between the power supply line and the first drive transistor.

6. The TFT array substrate according to claim 5 , wherein

the output switch includes an output transistor including a further semiconductor layer extending from the semiconductor layer of the first drive transistor, and

the semiconductor layer of the first drive transistor and the semiconductor layer of the output transistor are continuous.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2025
From: JAPAN DISPLAY INC.
To: MAGNOLIA WHITE CORPORATION
Reel/Frame 072130/0313 →
Priority Claims (3)
JP 2012-231740 · Oct 19, 2012 · national
JP 2013-012286 · Jan 25, 2013 · national
JP 2013-032359 · Feb 21, 2013 · national
Continuity (5)
Continuation 16119655 · Aug 31, 2018
Continuation 15365428 · Nov 30, 2016
Continuation 15167401 · May 27, 2016
Continuation 14056282 · Oct 17, 2013
Related Publication 20200175915A1 · Jun 4, 2020
Cited By (1)
US 12,532,615