Non-volatile memory device having a floating gate type memory cell
According to one embodiment, a non-volatile memory device includes electrodes, an interlayer insulating film, at least one semiconductor layer, conductive layers, first and second insulating films. The electrodes are arranged in a first direction. The interlayer insulating film is provided between the electrodes. The semiconductor layer extends in the first direction in the electrodes and the interlayer insulating film. The conductive layers are provided between each of the electrodes and the semiconductor layer, and separated from each other in the first direction. The first insulating film is provided between the conductive layers and the semiconductor layer. The second insulating film is provided between each of the electrodes and the conductive layers, and extends between each of the electrodes and the interlayer insulating film adjacent to the each of the electrodes. A width of the conductive layers in the first direction is narrower than that of the second insulating film.
1. A nonvolatile semiconductor memory device comprising:
a plurality of memory cells stacked in a first direction and electrically connected in series; and
a selection transistor provided above the memory cells,
at least one of the memory cells including:
a control gate electrode;
a first channel extending in the first direction through the control gate electrode;
a first insulating core film provided inside the first channel;
a conductor formed of silicon provided between the control gate electrode and the first channel; and
an insulator covering the conductor, the insulator including a first portion provided between the conductor and the first channel and a second portion provided between the control gate electrode and the conductor,
a width of the conductor in the first direction being narrower than a width of the control gate electrode in the first direction and a width of the second portion of the insulator in the first direction,
the control gate electrode surrounding an outer periphery of the conductor via the second portion of the insulator in a plane perpendicular to the first direction, and
the selection transistor including:
a selection gate electrode; and
a second channel extending in the first direction through the selection gate electrode, the second channel being connected to one end of the first channel and not overlapping with the control gate electrode when projected from the first direction.
2. The device according to claim 1 , further comprising a source layer provided below the memory cells.
3. The device according to claim 2 , wherein
another end of the first channel being electrically connected to the source layer.
4. The device according to claim 1 , wherein
the control gate electrode and an interlayer insulating film are alternately arranged in the first direction,
the first channel is provided inside a first hole piercing the control gate electrode and the interlayer insulating film alternately arranged, and
the first portion of the insulator extends in the first direction along the first channel.
5. The device according to claim 4 , wherein
the second channel is provided inside a second hole piercing the selection gate electrode, and
a dimension of the second hole is different from that of the first hole in a direction perpendicular to the first direction.
6. The device according to claim 1 , wherein
the selection gate electrode is provided to oppose the second channel in a direction perpendicular to the first direction, and
a gate insulating film is provided between the selection gate electrode and the second channel, any conductor being not provided between the selection gate electrode and the second channel.
7. The device according to claim 1 , wherein
a width of the selection gate electrode in the first direction is larger than a width of the control gate electrode in the first direction.
8. The device according to claim 1 , wherein
a position of the second channel is shifted from that of the first channel in a direction perpendicular to the first direction.
9. The device according to claim 1 , wherein
the selection transistor further includes a second insulating core film provided inside the second channel.
10. The device according to claim 1 , wherein
the conductor, the insulator and the first channel are provided concentrically when projected from the first direction.
11. A nonvolatile semiconductor memory device comprising:
a plurality of memory cells stacked in a first direction and electrically connected in series; and
a selection transistor provided above the memory cells,
at least one of the memory cells including:
a control gate electrode;
a first channel extending in the first direction through the control gate electrode;
a first insulating core film provided inside the first channel; and
a conductor formed of silicon surrounded with an insulator, the conductor being provided between the control gate electrode and the first channel,
a width of the conductor in the first direction being narrower than a width of the control gate electrode in the first direction,
the control gate electrode surrounding an outer periphery of the conductor via a portion of the insulator in a plane perpendicular to the first direction, and
the selection transistor including:
a selection gate electrode; and
a second channel extending in the first direction through the selection gate electrode, the second channel being connected to one end of the first channel and not overlapping with the control gate electrode when projected from the first direction.
12. The device according to claim 11 , further comprising a source layer provided below the memory cells.
13. The device according to claim 12 , wherein
another end of the first channel being electrically connected to the source layer.
14. The device according to claim 11 , wherein
the control gate electrode and an interlayer insulating film are alternately arranged in the first direction,
the first channel is provided inside a first hole piercing the control gate electrode and the interlayer insulating film alternately arranged, and
the insulator on a side of the first channel functions as a tunneling insulating film, the tunneling insulating film extending in the first direction along the first channel.
15. The device according to claim 14 , wherein
the second channel is provided inside a second hole piercing the selection gate electrode, and
a dimension of the second hole is different from that of the first hole in a direction perpendicular to the first direction.
16. The device according to claim 11 , wherein
the selection gate electrode is provided to oppose the second channel in a direction perpendicular to the first direction, and
a gate insulating film is provided between the selection gate electrode and the second channel, any conductor being not provided between the selection gate electrode and the second channel.
17. The device according to claim 11 , wherein
a width of the selection gate electrode in the first direction is larger than a width of the control gate electrode in the first direction.
18. The device according to claim 11 , wherein
a position of the second channel is shifted from that of the first channel in a direction perpendicular to the first direction.
19. The device according to claim 11 , wherein
the selection transistor further includes a second insulating core film provided inside the second channel.
20. The device according to claim 11 , wherein
the conductor, the insulator and the first channel are provided concentrically when projected from the first direction.