IP Library › Granted Patent US 11,921,325
Granted Patent B2
US 11,921,325 · App. 16/802,704 · Granted Mar 5, 2024

Semiconductor device and method of making

Inventors: Yi-Chen Chen (Jhubei, TW); Lee-Chuan Tseng (New Taipei, TW); Shih-Wei Lin (Taipei, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
G02B6/132G02B2006/12121G02B2006/12138G02B2006/12142
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Quick Facts
Patent No.
US 11,921,325
App. No.
16/802,704
Granted
Mar 5, 2024
Kind
B2
Abstract

A semiconductor device is provided. The semiconductor device includes a waveguide over a substrate. The semiconductor device includes a first dielectric structure over the substrate, wherein a portion of the waveguide is in the first dielectric structure. The semiconductor device includes a second dielectric structure under the waveguide, wherein a first sidewall of the second dielectric structure is adjacent a first sidewall of the substrate.

Claims (46)

1. A semiconductor device, comprising:

a waveguide over a substrate, wherein a top surface of the substrate faces the waveguide;

a first dielectric structure over the substrate, wherein a portion of the waveguide is in the first dielectric structure; and

a second dielectric structure under the waveguide, wherein a first sidewall of the second dielectric structure is adjacent a first sidewall of the substrate such that a plane extending parallel to the top surface of the substrate intersects the first sidewall of the second dielectric structure and the first sidewall of the substrate.

2. The semiconductor device of claim 1 , wherein a void is disposed between the first dielectric structure and the substrate.

3. The semiconductor device of claim 2 , wherein

the void is defined by a second sidewall of the second dielectric structure lying in a plane not parallel to the top surface of the substrate.

4. The semiconductor device of claim 3 , wherein a first portion of the waveguide extends in a direction away from the first sidewall of the second dielectric structure and a second portion of the waveguide extends in a direction away from the second sidewall of the second dielectric structure.

5. The semiconductor device of claim 1 , comprising:

a third dielectric structure under the waveguide, wherein a first sidewall of the third dielectric structure is adjacent a second sidewall of the substrate.

6. The semiconductor device of claim 5 , wherein:

the waveguide overlies a first portion of the substrate; and

the first portion of the substrate separates the second dielectric structure from the third dielectric structure.

7. The semiconductor device of claim 6 , wherein:

a second sidewall of the second dielectric structure is adjacent a first sidewall of the first portion of the substrate; and

a second sidewall of the third dielectric structure is adjacent a second sidewall of the first portion of the substrate.

8. The semiconductor device of claim 7 , wherein:

a void is disposed between the first dielectric structure and the substrate; and

the void is defined by a third sidewall of the second dielectric structure, a third sidewall of the third dielectric structure, and a third sidewall of the first portion of the substrate.

9. The semiconductor device of claim 5 , wherein:

a first void is disposed between the second dielectric structure and the third dielectric structure;

the waveguide overlies the first void;

the first void is defined by a second sidewall of the second dielectric structure and a second sidewall of the third dielectric structure;

a second void is disposed between the first dielectric structure and the substrate; and

the second void is defined by a third sidewall of the second dielectric structure and a third sidewall of the third dielectric structure.

10. The semiconductor device of claim 1 , wherein:

the waveguide has a first tapered sidewall having a first slope and a second tapered sidewall having a second slope; and

the second slope is opposite in polarity relative to the first slope.

11. A semiconductor device, comprising:

a waveguide over a substrate, wherein a top surface of the substrate faces the waveguide;

a first dielectric structure over the substrate, wherein a portion of the waveguide is in the first dielectric structure; and

a second dielectric structure under the waveguide, wherein:

a first sidewall of the second dielectric structure faces a first sidewall of the substrate, and

a void is defined by a second sidewall of the second dielectric structure, opposite the first sidewall of the second dielectric structure.

12. The semiconductor device of claim 11 , wherein a plane extending parallel to the top surface of the substrate intersects the void and the substrate.

13. The semiconductor device of claim 11 , wherein the void is further defined by the top surface of the substrate.

14. The semiconductor device of claim 13 , wherein the void is further defined by a bottom surface of the first dielectric structure.

15. The semiconductor device of claim 11 , wherein the void is further defined by a bottom surface of the first dielectric structure.

16. The semiconductor device of claim 11 , wherein a plane extending parallel to the top surface of the substrate intersects the first sidewall of the second dielectric structure and the first sidewall of the substrate.

17. A semiconductor device, comprising:

a waveguide over a substrate, wherein a top surface of the substrate faces the waveguide;

a first dielectric structure over the substrate, wherein a portion of the waveguide is in the first dielectric structure; and

a second dielectric structure under the waveguide, wherein a first sidewall of the second dielectric structure is in direct contact with a first sidewall of the substrate perpendicular to the top surface of the substrate.

18. The semiconductor device of claim 17 , wherein a void is defined by a second sidewall of the second dielectric structure, opposite the first sidewall of the second dielectric structure.

19. The semiconductor device of claim 17 , wherein a void is disposed between the first dielectric structure and the substrate.

20. The semiconductor device of claim 17 , wherein the first sidewall of the substrate faces a void in the semiconductor device.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2020
From: CHEN, YI-CHEN; TSENG, LEE-CHUAN; LIN, SHIH-WEI
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
Reel/Frame 052257/0497 →
Continuity (1)
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