IP Library › Granted Patent US 11,387,200
Granted Patent B2
US 11,387,200 · App. 16/827,296 · Granted Jul 12, 2022

Microelectronic devices with high frequency communication modules having compound semiconductor devices integrated on a package fabric

Inventors: Georgios C. Dogiamis (Chandler, AZ); Telesphor Kamgaing (Chandler, AZ); Javier A. Falcon (Chandler, AZ); Yoshihiro Tomita (Ibaraki, JP); Vijay K. Nair (Mesa, AZ)
Assignee: Intel Corporation
H01L23/66H01L24/16H01L25/18H01L24/13H01L24/20H01L25/0652H01L25/0657H01L2223/6672H01L2223/6677H01L2224/12105H01L2224/13025H01L2224/16225H01L2224/16235H01L2225/06517H01L2225/06541H01L2225/06572H01L2924/1032H01L2924/1033H01L2924/10253H01L2924/10329H01L2924/15192H01L2924/15311H01L2924/19011H01L2924/19105
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Quick Facts
Patent No.
US 11,387,200
App. No.
16/827,296
Granted
Jul 12, 2022
Kind
B2
Abstract

Embodiments of the invention include a microelectronic device that includes a first die formed with a silicon based substrate and a second die coupled to the first die. The second die is formed with compound semiconductor materials in a different substrate (e.g., compound semiconductor substrate, group III-V substrate). An antenna unit is coupled to the second die. The antenna unit transmits and receives communications at a frequency of approximately 4 GHz or higher.

Claims (39)

1. A computing device comprising:

at least one processor to process data; and

a communication module or chip coupled to the at least one processor, wherein the communication module or chip comprises:

a first die comprising silicon;

a first overmolded component having a second die coupled to the first die, the second die having devices or circuitry formed with compound semiconductor materials in a different substrate, wherein the first die is not entirely within a footprint of the first overmolded component; and

an antenna unit coupled to the second die.

2. The computing device of claim 1 wherein the first overmolded component further comprises an integrated passive die (IPD) coupled to at least one die, the IPD includes passives for passive matching networks.

3. The computing device of claim 2 , wherein the first die comprises a complementary metal-oxide-semiconductor (CMOS) baseband and transceiver circuitry that is flip-chipped on a surface of a first side of the communication module or chip.

4. The computing device of claim 1 , wherein the circuitry of the second die comprises at least one of power amplifiers, low noise amplifiers, and switches formed with group III-V materials, wherein the first overmolded component is attached on a surface of a second side of the communication module or chip.

5. The computing device of claim 1 , wherein the first overmolded component further comprises a third die coupled to at least one die, the third die having devices formed with compound semiconductor materials.

6. The computing device of claim 1 , further comprising:

a second overmolded component having a fourth die coupled to at least one die, the fourth die having devices or circuitry formed with compound semiconductor materials in a substrate.

7. The computing device of claim 1 , wherein the communication module or chip comprises a 5G package architecture for 5G communications.

8. The computing device of claim 1 , further comprising: a memory; a display module; and an input module.

9. A computing device comprising:

at least one processor to process data; and

a communication module or chip coupled to the at least one processor, wherein the communication module or chip comprises:

a first die comprising silicon, the first die on a surface of a first side of the communication module or chip;

a plurality of external connections on the surface of the first side of the communication module or chip, wherein the first die is laterally adjacent to the plurality of external connections;

a first overmolded component having a second die coupled to the first die, the second die having devices or circuitry formed with compound semiconductor materials in a different substrate, wherein the first die is not entirely within a footprint of the first overmolded component; and

an antenna unit coupled to the second die, the antenna unit for transmitting and receiving communications.

10. The computing device of claim 9 , wherein the first overmolded component further comprises an integrated passive die (IPD) coupled to at least one die, the IPD includes passives for passive matching networks.

11. The computing device of claim 9 , wherein the first die comprises a complementary metal-oxide-semiconductor (CMOS) baseband and transceiver circuitry that is flip-chipped on the surface of the first side of the communication module or chip.

12. The computing device of claim 9 , wherein the circuitry of the second die comprises at least one of power amplifiers, low noise amplifiers, and switches formed with group III-V materials, wherein the first overmolded component is attached on a surface of a second side of the communication module or chip.

13. The computing device of claim 9 , wherein the first overmolded component further comprises a third die coupled to at least one die, the third die having devices formed with compound semiconductor materials.

14. The computing device of claim 9 , further comprising:

a second overmolded component having a fourth die coupled to at least one die, the fourth die having devices or circuitry formed with compound semiconductor materials in a substrate.

15. A computing device comprising:

at least one processor to process data; and

a communication module or chip coupled to the at least one processor, wherein the communication module or chip comprises:

a first die comprising silicon, the first die on a surface of a first side of the communication module or chip;

a first overmolded component having a second die coupled to the first die, the second die having devices or circuitry formed with compound semiconductor materials in a different substrate, the first overmolded component on a surface of a second side of the communication module or chip, the second side opposite the first side, wherein the first die is not entirely within a footprint of the first overmolded component; and

an antenna unit coupled to the second die, the antenna unit for transmitting and receiving communications.

16. The computing device of claim 15 , further comprising:

a plurality of external connections on the surface of the first side of the communication module or chip, wherein the first die is laterally adjacent to the plurality of external connections.

17. The computing device of claim 15 , wherein the first overmolded component further comprises an integrated passive die (IPD) coupled to at least one die, the IPD includes passives for passive matching networks.

18. The computing device of claim 15 , wherein the first die comprises a complementary metal-oxide-semiconductor (CMOS) baseband and transceiver circuitry that is flip-chipped on the surface of the first side of the communication module or chip.

19. The computing device of claim 15 , wherein the circuitry of the second die comprises at least one of power amplifiers, low noise amplifiers, and switches formed with group III-V materials.

20. The computing device of claim 15 , wherein the first overmolded component further comprises a third die coupled to at least one die, the third die having devices formed with compound semiconductor materials.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2021
From: DOGIAMIS, GEORGIOS C.; KAMGAING, TELESPHOR; FALCON, JAVIER A.; TOMITA, YOSHIHIRO; NAIR, VIJAY K.
To: INTEL CORPORATION
Reel/Frame 057851/0680 →
Continuity (2)
Division 15771982
Related Publication 20200227366A1 · Jul 16, 2020
Cited By (2)
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