IP Library Granted Patent US 10,950,637
Granted Patent B2
US 10,950,637 · App. 16/830,916 · Granted Mar 16, 2021

Semiconductor device, manufacturing method, solid state image sensor, and electronic equipment

Inventor: Masaki Haneda (Kanagawa, JP)
Assignee: Sony Corporation
H01L27/14H01L21/3205H01L21/768H01L23/522H01L23/532H01L24/05H01L24/08H01L24/80H01L24/89H01L25/0657H01L27/1469H01L27/14634H01L27/14636H01L24/03H01L2224/0345H01L2224/0346H01L2224/03616H01L2224/05007H01L2224/0566H01L2224/05082H01L2224/05147H01L2224/05181H01L2224/05186H01L2224/05618H01L2224/05639H01L2224/05655H01L2224/05657H01L2224/0801H01L2224/08121H01L2224/08145H01L2224/08147H01L2224/80009H01L2224/80097H01L2224/80895H01L2224/80896H01L2224/80948H01L2224/80986H01L2924/0104H01L2924/01012H01L2924/01013H01L2924/01023H01L2924/01025H01L2924/05442
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Quick Facts
Patent No.
US 10,950,637
App. No.
16/830,916
Granted
Mar 16, 2021
Kind
B2
Abstract

The present disclosure relates to a semiconductor device, a manufacturing method, a solid state image sensor, and electronic equipment that can achieve further improvement in reliability. Connection pads are formed in interlayer films provided respectively in interconnection layers of a sensor substrate on which a sensor surface having pixels is formed and a signal processing substrate configured to perform signal processing on the sensor substrate to make an electrical connection between the sensor substrate and the signal processing substrate. Then, a metal oxide film is formed between the interlayer films of the sensor substrate and the signal processing substrate, between the connection pad formed on a side toward the sensor substrate and the interlayer film on a side toward the signal processing substrate, and between the connection pad formed on the side toward the signal processing substrate and the interlayer film on the side toward the sensor substrate. The present technology can be applied to a laminated-type CMOS image sensor, for example.

Claims (52)

1. A semiconductor device comprising:

a sensor substrate including a photodiode, a transistor, and a first wiring layer; and

a circuit substrate including a signal processing circuit and a second wiring layer, the sensor substrate being stacked on the circuit substrate,

wherein the first wiring layer includes a first connection pad and a first insulating film,

wherein the second wiring layer includes a second connection pad and a second insulating film,

wherein the first connection pad and the second connection pad are disposed in a peripheral region other than a pixel region that includes the photodiode,

wherein a first portion of a first barrier metal contacts a first portion of the second connection pad,

wherein a first portion of the first connection pad contacts a second portion of the second connection pad,

wherein a second portion of the first connection pad contacts a first portion of a barrier film,

wherein a second portion of the first barrier metal contacts a second portion of the barrier film,

wherein the first portion of the first barrier metal and the second portion of the first barrier metal are on opposite sides of the first connection pad, and

wherein a pixel signal from the photodiode is transferred to the signal processing circuit via the first connection pad and the second connection pad.

2. The semiconductor device according to claim 1 , wherein, in a cross sectional view, a third portion of the barrier film is disposed between and contacts a first portion of the first insulating film and a first portion of the second insulating film.

3. The semiconductor device according to claim 1 , wherein the barrier film includes an insulator.

4. The semiconductor device according to claim 1 , wherein the peripheral region surrounds the pixel region.

5. The semiconductor device according to claim 1 , wherein the first and second connection pads are rectangular in a cross sectional view.

6. The semiconductor device according to claim 1 , wherein the barrier film has a thickness ranging from 0.1 nm to 10 nm.

7. The semiconductor device according to claim 1 , wherein the first barrier metal covers three sides of the first connection pad in a cross sectional view.

8. The semiconductor device according to claim 1 , wherein a second barrier metal covers three sides of the second connection pad in a cross sectional view.

9. The device according to claim 1 , wherein the sensor substrate and the circuit substrate are stacked such that the first wiring layer and the second wiring layer face each other.

10. The semiconductor device according to claim 1 , wherein a silicon layer of the sensor substrate includes the photodiode and the silicon layer is stacked on the first wiring layer.

11. The semiconductor device according to claim 1 , wherein the first connection pad is at least partially covered by the first barrier metal on a side of the first connection pad furthest from the second insulating film.

12. The semiconductor device according to claim 1 , wherein the second connection pad is at least partially covered by a second barrier metal on a side of the second connection pad furthest from the first insulating film.

13. The semiconductor device according to claim 12 , wherein the second barrier metal covers at least one additional side of the second connection pad.

14. The semiconductor device according to claim 1 , the first barrier metal covers at least one side of the first connection pad.

15. The semiconductor device according to claim 1 , wherein the barrier film includes a metal insulator.

16. The semiconductor device according to claim 1 , wherein the first barrier metal and the second barrier metal include Ta.

17. The semiconductor device according to claim 1 , wherein the first connection pad and the second connection pad include Cu.

18. A light detecting device, comprising:

a sensor substrate including a photodiode, a transistor, and a first wiring layer; and

a circuit substrate including a signal processing circuit and a second wiring layer, the sensor substrate being stacked on the circuit substrate,

wherein the first wiring layer includes a first connection pad disposed in a surface of a first insulating film,

wherein the second wiring layer includes a second connection pad disposed in a surface of a second insulating film,

wherein the first connection pad and the second connection pad are disposed in a peripheral region other than a pixel region that includes the photodiode,

wherein a first portion of a first barrier metal contacts a first portion of the second connection pad,

wherein a first portion of the first connection pad contacts a second portion of the second connection pad,

wherein a second portion of the first connection pad contacts a first portion of a barrier film,

wherein a second portion of the first barrier metal contacts a second portion of the barrier film,

wherein a third portion of the barrier film is disposed between a part of the surface of the first insulating film and a part of the surface of the second insulating film, and

wherein the first portion of the first barrier metal and the second portion of the first barrier metal are on opposite sides of the first connection pad.

19. A vehicle sensor, comprising:

a sensor substrate including a photodiode, a transistor, and a first wiring layer; and

a circuit substrate including a signal processing circuit and a second wiring layer, the sensor substrate being stacked on the circuit substrate,

wherein the first wiring layer includes a first connection pad disposed in a surface of a first insulating film,

wherein the second wiring layer includes a second connection pad disposed in a surface of a second insulating film,

wherein the first connection pad and the second connection pad are disposed in a peripheral region other than a pixel region that includes the photodiode,

wherein a first portion of a first barrier metal contacts a first portion of the second connection pad,

wherein a first portion of the first connection pad contacts a second portion of the second connection pad,

wherein a second portion of the first connection pad contacts a first portion of a barrier film,

wherein a second portion of the first barrier metal contacts a second portion of the barrier film,

wherein a third portion of the barrier film is disposed between a part of the surface of the first insulating film and a part of the surface of the second insulating film, and

wherein the first portion of the first barrier metal and the second portion of the first barrier metal are on opposite sides of the first connection pad.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2020
From: HANEDA, MASAKI
To: SONY CORPORATION
Reel/Frame 052340/0258 →
Priority Claims (1)
JP 2015-104705 · May 22, 2015 · national
Continuity (3)
Continuation 16297167 · Mar 8, 2019
Continuation 15574207
Related Publication 20200227462A1 · Jul 16, 2020
Cited By (1)
US 12,347,798