IP Library › Granted Patent US 11,058,006
Granted Patent B2
US 11,058,006 · App. 16/838,228 · Granted Jul 6, 2021

Component-embedded substrate

Inventor: Hirokazu Yoshino (Nagano, JP)
Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
H05K1/186H05K1/115H05K3/4007H05K3/4644H05K3/4697H05K2201/10015H05K2203/107
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Quick Facts
Patent No.
US 11,058,006
App. No.
16/838,228
Granted
Jul 6, 2021
Kind
B2
Abstract

A component-embedded substrate includes: a buildup layer including an insulating resin layer and a conductor layer; a cavity that is formed in the buildup layer; an electronic component that is mounted on a bottom face of the cavity through an adhesive layer; a pedestal that is disposed on the bottom face of the cavity so as to be opposed to four corners of the electronic component; and a filling resin layer that is filled into the cavity to cover the electronic component and the pedestal.

Claims (52)

1. A component-embedded substrate comprising:

a buildup layer comprising an insulating resin layer and a conductor layer;

a cavity that is formed in the buildup layer;

an electronic component that is mounted on a bottom face of the cavity through an adhesive layer;

a pedestal that is disposed on the bottom face of the cavity so as to be opposed to four corners of the electronic component; and

a filling resin layer that is filled into the cavity to cover the electronic component and the pedestal,

wherein a thickness of the pedestal is larger than a thickness of the adhesive layer, and the thickness of the pedestal is smaller than a depth of the cavity, and

wherein an entirety of the pedestal is housed within the cavity when the component-embedded substrate is viewed in plan view, and the filling resin covers an entirety of an upper surface of the pedestal, the upper surface of the pedestal being opposite to a lower surface of the pedestal which faces the bottom face of the cavity.

2. The component-embedded substrate according to claim 1 , wherein:

the bottom face of the cavity is a surface of the conductor layer exposed from the cavity.

3. The component-embedded substrate according to claim 1 , wherein:

the electronic component has a first side face and a second face that is opposite to the first side face; and

the pedestal is disposed on the bottom face of the cavity so as to be opposed to the first side face and the second side face.

4. The component-embedded substrate according to claim 1 , wherein:

the pedestal is disposed on the bottom face of the cavity so as to completely surround the electronic component.

5. The component-embedded substrate according to claim 1 , wherein:

the pedestal comprises:

a first pedestal portion that is opposed to a first corner portion of the electronic component,

a second pedestal portion that is opposed to a second corner portion of the electronic component,

a third pedestal portion that is opposed to a third corner portion of the electronic component, and

a fourth pedestal portion that is opposed to a fourth corner portion of the electronic component; and

each of the first pedestal portion, the second pedestal portion, the third pedestal portion and the fourth pedestal portions is formed into a rectangular shape in plan view.

6. The component-embedded substrate according to claim 1 , wherein:

the electronic component comprises:

a first side face,

a second side face that is opposite to the first side face,

a third side face that is positioned between the first side face and the second side face, and

a fourth side face that is opposite to the third side face;

the pedestal comprises:

a first pedestal portion that is opposed to the first side face and the third side face,

a second pedestal portion that is opposed to the first side face and the fourth side face,

a third pedestal portion that is opposed to the second side face and the third side face, and

a fourth pedestal portion that is opposed to the second side face and the fourth side face; and

each of the first pedestal portion, the second pedestal portion, the third pedestal portion and the fourth pedestal portions is substantially formed into an L shape in plan view.

7. The component-embedded substrate according to claim 1 , wherein:

the pedestal is formed of an insulating resin material and formed as a member separate from the buildup layer.

8. The component-embedded substrate according to claim 1 , wherein:

a side wall of the cavity is defined by the insulating resin layer, and the bottom face of the cavity is a surface of the conductor layer exposed from the cavity; and

the side wall of the cavity and the bottom face of the cavity are continuously connected to each other.

9. A component-embedded substrate comprising:

a buildup layer comprising an insulating resin layer and a conductor layer;

a cavity that is formed in the buildup layer;

an electronic component that is mounted on a bottom face of the cavity through an adhesive layer;

a pedestal that is disposed on the bottom face of the cavity so as to be opposed to four corners of the electronic component; and

a filling resin layer that is filled into the cavity to cover the electronic component and the pedestal,

wherein:

the pedestal comprises:

a first pedestal portion that is opposed to a first corner portion of the electronic component,

a second pedestal portion that is opposed to a second corner portion of the electronic component,

a third pedestal portion that is opposed to a third corner portion of the electronic component, and

a fourth pedestal portion that is opposed to a fourth corner portion of the electronic component; and

each of the first pedestal portion, the second pedestal portion, the third pedestal portion and the fourth pedestal portions is formed into a triangular shape in plan view.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 2, 2020
From: YOSHINO, HIROKAZU
To: SHINKO ELECTRIC INDUSTRIES CO., LTD.
Reel/Frame 052295/0215 →
Priority Claims (1)
JP JP2019-075899 · Apr 11, 2019 · national
Continuity (1)
Related Publication 20200329564A1 · Oct 15, 2020