Semiconductor device and method for manufacturing the same
A semiconductor device includes a predetermined number of leads, a semiconductor element electrically connected to the leads and supported by one of the leads, and a sealing resin that covers the semiconductor element and a part of each lead. Each lead includes some portions exposed from the sealing resin. A surface plating layer is formed on at least one of the exposed portions of the respective leads.
1. A semiconductor device comprising:
a first lead having an obverse surface and a reverse surface that are spaced apart from each other in a thickness direction;
a semiconductor element provided with at least one electrode and supported by the first lead;
a second lead adjacent to the first lead;
a sealing resin covering a part of the first lead, a part of the second lead, and the semiconductor element, the sealing resin being rectangular in plan view and including a first side surface, a second side surface opposite to the first side surface, a third side surface other than the first and the second side surface, and a bottom surface;
a wire connecting the second lead and the electrode of the semiconductor element to each other; and
a plurality of wires each connecting the semiconductor element and the second lead to each other,
wherein the first lead comprises a plurality of exposed portions that are exposed from the sealing resin and include a first exposed portion exposed from the first side surface of the sealing resin, a second exposed portion exposed from the second side surface of the sealing resin, and a third exposed portion exposed from the bottom surface of the sealing resin,
the second lead is electrically connected to the electrode of the semiconductor element,
the second lead includes an exposed portion exposed from the third side surface of the sealing resin, and
the first side surface of the sealing resin includes a first section and a second section, the first section being disposed outward with respect to the second section in plan view, the first exposed portion of the first lead being located in the second section of the first side surface of the sealing resin.
2. The semiconductor device according to claim 1 , wherein the first lead comprises a thick portion overlapping with the semiconductor element in plan view, and
the first exposed portion is smaller in size along a straight line parallel to the first side surface of the sealing resin in plan view than the thick portion of the first lead.
3. The semiconductor device according to claim 1 , wherein the first lead comprises a plurality of exposed portions, including the first exposed portion, that are exposed from the first side surface of the sealing resin.
4. The semiconductor device according to claim 3 , wherein the first lead comprises a plurality of exposed portions, including the second exposed portion, that are exposed from the second side surface of the sealing resin.
5. The semiconductor device according to claim 1 , wherein each of the first exposed portion and the second exposed portion is formed with a plating layer.
6. The semiconductor device according to claim 1 , wherein the second lead is smaller in area in plan view than the first lead.
7. The semiconductor device according to 1 , wherein the second lead is disposed closer to the first side surface of the sealing resin than to the second side surface of the sealing resin.
8. The semiconductor device according to claim 1 , wherein the second lead comprises an additional exposed portion exposed from the first side surface of the sealing resin.
9. The semiconductor device according to claim 1 , wherein the first lead comprises a linear edge facing the second lead in plan view, and the second lead is elongated along the linear edge.
10. The semiconductor device according to claim 9 , wherein the second lead comprises an additional exposed portion exposed from the second side surface of the sealing resin.
11. The semiconductor device according to claim 9 , wherein the sealing resin has an imaginary center line perpendicular to the third side surface of the sealing resin in plan view, and the imaginary center line extends through the semiconductor element and the second lead in plan view.
12. The semiconductor device according to claim 1 , the at least one electrode of the semiconductor element comprises a first electrode and a second electrode, and the plurality of wires comprise a first wire bonded to the first electrode and a second wire bonded to the second electrode.
13. The semiconductor device according to claim 1 , wherein the sealing resin comprises a fourth side surface opposite to the third side surface, and the first lead comprises a fourth exposed portion exposed from the fourth side surface of the sealing resin.
14. The semiconductor device according to claim 1 , wherein the exposed portion of the second lead is spaced apart from the first and the second side surface of the sealing resin in plan view.
15. The semiconductor device according to claim 1 , wherein the first lead is greater in size along a straight line parallel to the first side surface of the sealing resin in plan view than the second lead.
16. The semiconductor device according to claim 1 , wherein the plurality of exposed portions of the first lead are formed integral with a remaining portion of the first lead.
17. The semiconductor device according to claim 1 , wherein the first lead comprises a linear edge facing the second lead in plan view, and
the first exposed portion and the second exposed portion are aligned with each other along an imaginary line that is parallel to and spaced apart from the linear edge of the first lead in plan view.
18. The semiconductor device according to claim 1 , wherein the second lead includes a plurality of exposed portions exposed from the bottom surface of the sealing resin.