IP Library Granted Patent US 11,276,762
Granted Patent B2
US 11,276,762 · App. 16/855,161 · Granted Mar 15, 2022

Interface layer control methods for semiconductor power devices and semiconductor devices formed thereof

Inventor: Daniel Jenner Lichtenwalner (Raleigh, NC)
Assignee: Wolfspeed, Inc.
H01L29/42368H01L29/36H01L29/66681H01L29/7816
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Quick Facts
Patent No.
US 11,276,762
App. No.
16/855,161
Granted
Mar 15, 2022
Kind
B2
Abstract

A semiconductor device includes a semiconductor layer structure, a gate insulating pattern on the semiconductor layer structure, a gate electrode on the gate insulating pattern, and an interface layer between the gate insulating pattern and the semiconductor layer structure, the interface layer having a first segment and a second segment with a gap therebetween.

Claims (74)

1. A semiconductor device comprising:

a semiconductor layer structure;

a gate insulator on the semiconductor layer structure;

a gate electrode on the gate insulator; and

an interface layer between the gate insulator and the semiconductor layer structure, the interface layer having a first segment and a second segment with a gap therebetween,

wherein the interface layer comprises hydrogen (H), nitrogen (N), boron (B), phosphorous (P), lanthanum (La), strontium (Sr), and/or barium (Ba).

2. The semiconductor device of claim 1 , wherein the first segment of the interface layer extends from an edge of the gate insulator in a direction towards a center portion of the gate insulator.

3. The semiconductor device of claim 2 , wherein a dopant concentration of a portion of the first segment of the interface layer decreases as the first segment extends towards the center portion of the gate insulator.

4. The semiconductor device of claim 2 , wherein a thickness of the gate insulator is greater near the edge of the gate insulator than in the center portion of the gate insulator.

5. The semiconductor device of claim 1 , wherein the first segment and the second segment of the interface layer are substantially coplanar.

6. The semiconductor device of claim 1 , wherein the interface layer further comprises a third segment that is farther from a top surface of the semiconductor layer structure than the first segment or the second segment.

7. The semiconductor device of claim 6 , further comprising a dielectric pattern between the top surface of the semiconductor layer structure and the third segment of the interface layer.

8. The semiconductor device of claim 1 , wherein a portion of the gate electrode extends below a top surface of the semiconductor layer structure.

9. A semiconductor device comprising:

a semiconductor layer structure;

a gate insulator on the semiconductor layer structure;

a gate electrode on the gate insulator; and

an interface layer between the gate insulator and the semiconductor layer structure, the interface layer having a first segment and a second segment with a gap therebetween,

wherein the semiconductor layer structure comprises a first source/drain region, a second source/drain region, and a junction field effect transistor (JFET) region between the first source/drain region and the second source/drain region.

10. The semiconductor device of claim 9 , wherein the gap is over at least a portion of the JFET region.

11. The semiconductor device of claim 9 ,

wherein the first segment is between the first source/drain region and the gate insulator,

wherein the second segment is between the second source/drain region and the gate insulator, and

wherein an upper surface of the semiconductor layer structure between at least a portion of the JFET region and the gate insulator is free of the interface layer.

12. The semiconductor device of claim 11 , wherein the first segment of the interface layer extends towards the JFET region from a first position over the first source/drain region to a second position beyond the first source/drain region that is between the gate insulator and the upper surface of the semiconductor layer structure.

13. The semiconductor device of claim 12 , wherein a dopant concentration of the first segment of the interface layer decreases as the first segment extends towards the second position.

14. The semiconductor device of claim 9 , wherein the interface layer further comprises a third segment on the JFET region that is farther from a top surface of the semiconductor layer structure than the first segment or the second segment.

15. The semiconductor device of claim 14 , further comprising a dielectric pattern between the JFET region and the third segment of the interface layer.

16. A semiconductor device comprising:

a semiconductor layer structure;

a gate insulator on the semiconductor layer structure;

a gate electrode on the gate insulator; and

an interface layer between the gate insulator and the semiconductor layer structure, the interface layer having first and second edge portions on opposite sides of a center portion,

wherein a dopant concentration of the interface layer decreases from the first edge portion to the center portion.

17. The semiconductor device of claim 16 , wherein a first segment of the interface layer extends from the first edge portion of the interface layer in a direction towards the center portion of the interface layer.

18. The semiconductor device of claim 16 , wherein a change in the dopant concentration of the interface layer from the first edge portion to the center portion is linear, exponential, step, and/or random.

19. The semiconductor device of claim 16 , wherein the interface layer comprises a first segment in the first edge portion of the interface layer and a second segment in the second edge portion of the interface layer,

wherein the semiconductor layer structure comprises a first source/drain region, a second source/drain region, and a junction field effect transistor (JFET) region between the first source/drain region and the second source/drain region, and

wherein the semiconductor device further comprises a gap between the first segment and the second segment of the interface layer that is over at least a portion of the JFET region.

20. The semiconductor device of claim 16 , wherein a portion of the gate electrode extends below a top surface of the semiconductor layer structure.

21. The semiconductor device of claim 16 , wherein the interface layer is also present between the gate electrode and the gate insulator.

22. The semiconductor device of claim 16 , wherein a thickness of the gate insulator is greater adjacent an edge of the gate insulator than in a center portion of the gate insulator.

23. The semiconductor device of claim 16 , wherein the semiconductor layer structure comprises a first source/drain region, a second source/drain region, and a junction field effect transistor (JFET) region between the first source/drain region and the second source/drain region.

24. The semiconductor device of claim 16 , wherein the interface layer comprises hydrogen (H), nitrogen (N), boron (B), phosphorous (P), lanthanum (La), strontium (Sr), and/or barium (Ba).

25. The semiconductor device of claim 16 , wherein a portion of the gate electrode extends below a top surface of the semiconductor layer structure.

26. A semiconductor device comprising:

a semiconductor layer structure;

a gate insulator on the semiconductor layer structure;

a gate electrode on the gate insulator; and

an interface layer between the gate insulator and the semiconductor layer structure, the interface layer having a first segment and a second segment with a gap therebetween,

wherein a thickness of the gate insulator is greater near an edge of the gate insulator than in a center portion of the gate insulator.

27. A semiconductor device comprising:

a semiconductor layer structure;

a gate insulator on the semiconductor layer structure;

a gate electrode on the gate insulator; and

an interface layer between the gate insulator and the semiconductor layer structure, the interface layer having a first segment and a second segment with a gap therebetween,

wherein the interface layer further comprises a third segment that is farther from a top surface of the semiconductor layer structure than the first segment or the second segment.

28. A semiconductor device comprising:

a semiconductor layer structure;

a gate insulator on the semiconductor layer structure;

a gate electrode on the gate insulator; and

an interface layer between the gate insulator and the semiconductor layer structure, the interface layer having a first segment and a second segment with a gap therebetween,

wherein a portion of the gate electrode extends below a top surface of the semiconductor layer structure.

29. The semiconductor device of claim 28 , wherein a dopant concentration of a portion of the first segment of the interface layer decreases as the first segment extends towards a center portion of the gate insulator.

30. The semiconductor device of claim 28 , wherein the interface layer comprises hydrogen (H), nitrogen (N), boron (B), phosphorous (P), lanthanum (La), strontium (Sr), and/or barium (Ba).

31. A semiconductor device comprising:

a semiconductor layer structure;

a gate insulator on the semiconductor layer structure;

a gate electrode on the gate insulator; and

an interface layer between the gate insulator and the semiconductor layer structure, the interface layer having a first segment and a second segment with a gap therebetween,

wherein the first segment of the interface layer extends from an edge of the gate insulator in a direction towards a center portion of the gate insulator,

wherein a dopant concentration of a portion of the first segment of the interface layer decreases as the first segment extends towards the center portion of the gate insulator.

32. The semiconductor device of claim 31 , wherein the semiconductor layer structure comprises a first source/drain region, a second source/drain region, and a junction field effect transistor (JFET) region between the first source/drain region and the second source/drain region.

33. The semiconductor device of claim 31 , wherein a portion of the gate electrode extends below a top surface of the semiconductor layer structure.

Assignments (9)
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Mar 26, 2026
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 075280/0919 →
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Sep 30, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 072992/0588 →
RELEASE OF SECURITY INTEREST IN INTELLECTUAL PROPERTY COLLATERAL AT REEL/FRAME NO. 64185/0755 Recorded Sep 30, 2025
From: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WOLFSPEED, INC.
Reel/Frame 072989/0001 →
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Sep 30, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 072992/0113 →
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Sep 30, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 072992/0381 →
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Sep 30, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 072992/0467 →
SECURITY INTEREST Recorded Jun 30, 2023
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION
Reel/Frame 064185/0755 →
CHANGE OF NAME Recorded Jan 19, 2022
From: CREE, INC.
To: WOLFSPEED, INC.
Reel/Frame 058767/0707 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 22, 2020
From: LICHTENWALNER, DANIEL JENNER
To: CREE, INC.
Reel/Frame 052462/0895 →