IP Library Granted Patent US 11,165,977
Granted Patent B2
US 11,165,977 · App. 16/860,327 · Granted Nov 2, 2021

Imaging systems and methods for generating high dynamic range images

Inventors: Tomas Geurts (Haasrode, BE); Manuel H. Innocent (Wezemaal, BE); Robert Michael Guidash (Rochester, NY); Genis Chapinal (Antwerp, BE)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H04N5/3559H04N5/3575H04N5/378
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Quick Facts
Patent No.
US 11,165,977
App. No.
16/860,327
Granted
Nov 2, 2021
Kind
B2
Abstract

An imaging system may include an image sensor having an image sensor. The image sensor may include an image sensor pixel array coupled to row control circuitry and column readout circuitry. The image sensor pixel array may include a plurality of image sensor pixels. Each image sensor pixel may include a photosensitive element configured to generate charge in response to incident light, a first charge storage structure configured to accumulate an overflow portion of the generated charge for a low gain signal and a second charge storage structure configured to store a remaining portion of the generated charge for a high gain signal. Each image sensor pixel may also include a dedicated overflow charge storage structure interposed between the first charge storage structure and a floating diffusion region.

Claims (56)

1. An image sensor pixel comprising:

a photosensitive element;

a floating diffusion region;

first and second separate paths coupled in parallel between the photosensitive element to the floating diffusion region, an end of the first path being directly coupled to the photosensitive element and an end of the second path being directly coupled to the photosensitive element;

a first charge storage structure coupled along the first path between the photosensitive element and the floating diffusion region;

a second charge storage structure coupled along the second path between the photosensitive element and the floating diffusion region; and

a third charge storage structure coupled along the second path between the second charge storage structure and the floating diffusion region.

2. The image sensor pixel defined in claim 1 further comprising:

a transistor coupled between the third charge storage structure and the floating diffusion region.

3. The image sensor pixel defined in claim 1 , wherein the second charge storage structure is configured to receive charge associated with a low gain signal, and the first charge storage structure is configured to receive additional charge associated with a high gain signal.

4. The image sensor pixel defined in claim 3 , wherein the third charge storage structure is configured to receive the charge associated with the low gain signal and to perform a charge sharing operation with the floating diffusion region using the charge associated with the low gain signal.

5. The image sensor pixel defined in claim 1 further comprising:

a transistor coupled between the second charge storage structure and the third charge storage structure and configured to transfer charge from the second charge storage structure to the third charge storage structure.

6. The image sensor pixel defined in claim 5 further comprising:

an additional transistor coupled between the third charge storage structure and the floating diffusion region, wherein the transistor is configured to be deactivated during a readout operation for the charge, and the additional transistor is configured to be activated during the readout operation for the charge.

7. The image sensor pixel defined in claim 1 further comprising:

a first transistor coupled along the first path and coupled between the photosensitive element and the first charge storage structure; and

a second transistor coupled along the second path and coupled between the photosensitive element and the second charge storage structure.

8. The image sensor pixel defined in claim 1 , wherein the second charge storage structure comprises a first capacitor, and the third charge storage structure comprises a second capacitor.

9. The image sensor pixel defined in claim 8 , wherein the first capacitor has a first terminal coupled along a first portion of the second path between the photosensitive element and the second charge storage structure, the second capacitor has a first terminal coupled along a second portion of the second path between the second charge storage structure and the floating diffusion region, and the first and second capacitors each have a corresponding second terminal coupled to a reference voltage source.

10. The image sensor pixel defined in claim 8 , wherein the first charge storage structure comprises a storage gate.

11. The image sensor pixel defined in claim 10 further comprising:

a first transistor coupled between the storage gate and the floating diffusion region;

a second transistor coupled between the photosensitive element and the first capacitor;

a third transistor coupled between the first capacitor and the second capacitor; and

a fourth transistor coupled between the second capacitor and the floating diffusion region.

12. The image sensor pixel defined in claim 11 further comprising:

a source follower transistor; and

a row select transistor, the source follower transistor and the row select transistor coupling the floating diffusion region to a pixel output path.

13. The image sensor pixel defined in claim 1 , wherein the third charge storage structure has a charge storage terminal that is on the second path.

14. The image sensor pixel defined in claim 13 , wherein the charge storage terminal of the third charge storage structure is on a floating diffusion region reset path.

15. The image sensor pixel defined in claim 13 , wherein the charge storage terminal of the third charge storage structure is separated from a floating diffusion region reset path.

16. The image sensor pixel defined in claim 1 further comprising:

a first transistor that couples the second charge storage structure to a node on the second path between the second charge storage structure and the floating diffusion region;

a second transistor that couples the third charge storage structure to the node; and

a third transistor that couples the floating diffusion region to the node.

17. An image sensor comprising:

an array of image sensor pixels, an image sensor pixel in the array including:

a photosensitive element;

a floating diffusion region;

first, second, and third charge storage structures, the first charge storage structure being coupled between the photosensitive element and the floating diffusion region;

a first transistor that couples the photosensitive element to the second charge storage structure, the photosensitive element being coupled between the first transistor and the first charge storage structure;

a second transistor that couples the second charge storage structure to the third charge storage structure; and

a third transistor that couples the third charge storage structure to the floating diffusion region.

18. The image sensor defined in claim 17 , wherein the image sensor pixel in the array includes a lateral overflow drain coupling the photosensitive element to a voltage source providing a supply voltage.

19. An image sensor pixel comprising:

a photosensitive element;

a floating diffusion region;

a first charge storage structure coupled between the photosensitive element and the floating diffusion region;

a second charge storage structure, the photosensitive element being coupled between the first and second charge storage structures;

a third charge storage structure;

a first transistor that couples the second charge storage structure to the third charge storage structure; and

a second transistor that couples the third charge storage structure to the floating diffusion region.

20. The image sensor pixel defined in claim 19 , further comprising:

a third transistor that is directly coupled to the floating diffusion region and forms a reset path for the floating diffusion region; and

a fourth transistor that is directly coupled to the second charge storage structure and forms a reset path for the second charge storage structure.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL 053613, FRAME 0621 Recorded Aug 17, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064618/0942 →
SECURITY INTEREST Recorded Aug 27, 2020
From: FAIRCHILD SEMICONDUCTOR CORPORATION; SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 053613/0621 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 28, 2020
From: GEURTS, TOMAS; INNOCENT, MANUEL H.; GUIDASH, ROBERT MICHAEL; CHAPINAL, GENIS
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 052511/0770 →
Continuity (2)
Provisional Application 62876931 · Jul 22, 2019
Related Publication 20210029312A1 · Jan 28, 2021
Cited By (1)
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