IP Library › Granted Patent US 10,818,235
Granted Patent B2
US 10,818,235 · App. 16/861,676 · Granted Oct 27, 2020

EL display apparatus

Inventors: Hiroshi Takahara (Osaka, JP); Hitoshi Tsuge (Osaka, JP)
Assignee: JOLED INC.
G09G3/3241G09G3/2003G09G3/2007G09G3/32G09G3/325G09G3/3233G09G3/3258G09G3/3266G09G3/3275H01L27/124H01L27/127H01L27/1251H01L27/1255H01L27/3211H01L27/3244H01L27/3262H01L27/3265H01L51/525H01L51/5259H05K999/99G09G5/02G09G2300/0404G09G2300/0413G09G2300/0809G09G2300/0814G09G2300/0819G09G2300/0842G09G2300/0852G09G2300/0861G09G2310/0205G09G2310/027G09G2310/0218G09G2310/0248G09G2310/0251G09G2310/0256G09G2310/0289G09G2310/08G09G2320/0247G09G2320/0257G09G2320/0261G09G2320/043G09G2320/06G09G2320/0606G09G2320/0626G09G2320/0646G09G2320/0653H01L27/156H01L27/3216H01L29/78645H01L29/78672H01L33/56H01L33/58H01L51/5253H01L51/5281
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Quick Facts
Patent No.
US 10,818,235
App. No.
16/861,676
Granted
Oct 27, 2020
Kind
B2
Abstract

An EL display apparatus is provided. A display screen includes pixels arranged in a matrix, with each pixel including an EL device and a pixel circuit. A source driver circuit is configured to output an analog video signal to each pixel. A gate driver circuit is on at least one side of the display screen, with the gate driver circuit including first and second gate driver circuits. Each pixel includes a driving transistor, a first switch transistor, and a second switch transistor. A gate terminal of the first switch transistor is connected to a first gate signal line of the first gate driver circuit, and a gate terminal of the second switch transistor is connected to a second gate signal line of the second gate driver circuit. The first and second switch transistors are on/off controlled, independently, by the first and second gate driver circuits.

Claims (39)

1. An electroluminescent (EL) display apparatus, comprising:

a display screen including pixels arranged in a matrix, each of the pixels including an EL device and a pixel circuit;

a source driver circuit configured to output analog video signals to the pixels;

a plurality of source signal lines through which the analog video signals output from the source driver circuit are transmitted;

a gate driver circuit on at least one side of the display screen, the gate driver circuit including a first gate driver circuit and a second gate driver circuit;

a plurality of first gate signal lines through which a first selection voltage or a first non-selection voltage output from the first gate driver circuit is transmitted; and

a plurality of second gate signal lines through which a second selection voltage or a second non-selection voltage output from the second gate driver circuit is transmitted,

wherein the pixel circuit of each of the pixels includes:

a driving transistor configured to provide a current to the EL device;

a first switch transistor provided on a current path through which the current is provided from a power line through the driving transistor to the EL device; and

a second switch transistor to supply, to the driving transistor, an analog video signal from one of the plurality of source signal lines,

a gate terminal of the first switch transistor is connected to one of the plurality of first gate signal lines,

a gate terminal of the second switch transistor is connected to one of the plurality of second gate signal lines,

the first switch transistor and the second switch transistor are on/off controlled, independently, by the first gate driver circuit and the second gate driver circuit, the first switch transistor being controlled by the first gate driver circuit based on the first selection voltage and the first non-selection voltage, the second switch transistor being controlled by the second gate driver circuit based on the second selection voltage and the second non-selection voltage,

the source driver circuit includes a semiconductor chip,

an output terminal of the source driver circuit is connected to one of the plurality of source signal lines,

the pixel circuit of each of the pixels further includes a third switch transistor,

the third switch transistor is between a pixel electrode of the respective pixel and a voltage line, and

the pixel electrode of the respective pixel is an anode terminal of the EL device, and the voltage line is configured to supply a reverse bias voltage for reverse biasing the anode terminal of the EL device.

2. The EL display apparatus according to claim 1 ,

wherein the pixels arranged in the matrix on the display screen include a first pixel for a first color and a second pixel for a second color, and

an area of a pixel electrode of the first pixel and an area of a pixel electrode of the second pixel are different.

3. The EL display apparatus according to claim 1 ,

wherein the first gate driver circuit is configured to turn the first switch transistor of each of the pixels on and off to generate a band-shaped non-display region and a band-shaped display region on the display screen and to move the band-shaped non-display region and the band-shaped display region relative to the display screen.

4. The EL display apparatus according to claim 1 ,

wherein the first gate driver circuit is configured to turn the first switch transistor of each of the pixels on and off to simultaneously generate a plurality of band-shaped non-display regions and a plurality of band-shaped display regions on the display screen and to move the plurality of band-shaped non-display regions and the plurality of band-shaped display regions relative to the display screen.

5. The EL display apparatus according to claim 4 ,

wherein the plurality of band-shaped non-display regions is spaced apart on the display screen, and

the plurality of band-shaped display regions is spaced apart on the display screen.

6. The EL display apparatus according to claim 4 ,

wherein the first gate driver circuit is configured to change a duty ratio of an area of one non-display region on the display screen to an area of one display region on the display screen depending on a brightness adjustment.

7. The EL display apparatus according to claim 1 ,

wherein the plurality of first gate signal lines is divided into a plurality of blocks, and first gate signal lines in one block are connected as one control line.

8. The EL display apparatus according to claim 1 ,

wherein the gate driver circuit is configured to receive a control signal that is level-shifted by the source driver circuit.

9. The EL display apparatus according to claim 1 ,

wherein each of the pixels further includes an encapsulating film that seals the EL device.

10. An electronic device, comprising:

an EL display apparatus according to claim 1 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2020
From: PANASONIC CORPORATION
To: JOLED INC.
Reel/Frame 052527/0871 →
Priority Claims (4)
JP 2001-271311 · Sep 7, 2001 · national
JP 2001-291598 · Sep 25, 2001 · national
JP 2001-347014 · Nov 13, 2001 · national
JP 2002-136117 · May 10, 2002 · national
Continuity (6)
Continuation 16714206 · Dec 13, 2019
Continuation 16152999 · Oct 5, 2018
Continuation 15335901 · Oct 27, 2016
Continuation 14341620 · Jul 25, 2014
Continuation 10488591
Related Publication 20200258451A1 · Aug 13, 2020
Cited By (1)
US 12,213,358