SEMICONDUCTOR PACKAGES WITH PASSIVATING MATERIAL ON DIE SIDEWALLS AND RELATED METHODS
Implementations of a semiconductor package may include a singulated die and a passivating material of a predetermined thickness across a majority of a singulated surface of the singulated die on at least one singulated surface of the singulated die.
1 . A semiconductor package comprising:
a singulated die; and
a passivating material of a predetermined thickness across a majority of a singulated surface of the singulated die on at least one singulated surface of the singulated die.
2 . The semiconductor package of claim 1 , wherein the singulated die comprises a perimeter comprising a closed shape.
3 . The semiconductor package of claim 1 , wherein the singulated die comprises a perimeter comprising a rectangular shape.
4 . The semiconductor package of claim 1 , wherein the singulated die comprises a perimeter comprising an elliptical shape.
5 . The semiconductor package of claim 1 , wherein the singulated die comprises a perimeter comprising a triangular shape.
6 . The semiconductor package of claim 1 , wherein the singulated die comprises a perimeter comprising a polygonal shape.
7 . The semiconductor package of claim 1 , wherein the passivating material comprises one of silicon dioxide and borophosphosilicate glass (BPSG).
8 . A semiconductor package comprising:
a die having a first largest planar surface and a second largest planar surface, the die comprising a thickness between the first largest planar surface and the second largest planar surface, the thickness including a cut surface; and
a passivating material of a predetermined thickness coupled at the thickness and extending along at least half of the cut surface of the thickness to the second largest planar surface.
9 . The semiconductor package of claim 8 , wherein the die comprises a perimeter comprising a closed shape.
10 . The semiconductor package of claim 8 , wherein the die comprises a perimeter comprising a rectangular shape.
11 . The semiconductor package of claim 8 , wherein the die comprises a perimeter comprising an elliptical shape.
12 . The semiconductor package of claim 8 , wherein the die comprises a perimeter comprising a triangular shape.
13 . The semiconductor package of claim 8 , wherein the die comprises a perimeter comprising a polygonal shape.
14 . The semiconductor package of claim 8 , wherein the passivating material comprises one of silicon dioxide and borophosphosilicate glass (BPSG).
15 . A method of singulating a die comprising:
at least partially separating each of a plurality of die from each other at a plurality of junctions between each of the plurality of die, each of the plurality of die comprising a thickness comprising a cut surface; and
forming a passivating material of a predetermined thickness across at least a portion of the cut surface of the thickness.
16 . The method of claim 15 , wherein forming the passivating material further comprises using chemical vapor deposition.
17 . The method of claim 15 , wherein each of the plurality of die is separated through one of stealth dicing, sawing, etching, laser ablating, laser damaging, scribing and breaking, or scribing and expanding.
18 . The method of claim 15 , further comprising masking to prevent growth of the passivating material on a largest planar surface of each of the plurality of die.
19 . The method of claim 18 , wherein the masking comprises forming a photoresist layer on the largest planar surface of each of the plurality of die.
20 . The method of claim 15 , further comprising overmolding each of the plurality of die with a mold compound.