Semiconductor devices including a passive material between memory cells and conductive access lines
A semiconductor device includes first conductive lines extending in a first direction, second conductive lines extending in a second direction, memory cells disposed between the first conductive lines and the second conductive lines, each memory cell disposed at an intersection of a first conductive line and a second conductive line, and a passive material between the memory cells and at least one of the first conductive lines and the second conductive lines. Related semiconductor devices and electronic devices are disclosed.
1. A semiconductor device, comprising:
an array of memory cells;
a first conductive line on a first side of a group of memory cells of the array of memory cells, the first conductive line extending in a first direction and extending between adjacent memory cells of the first group of memory cells;
a second conductive line on a second side of at least one memory cell of the first group of memory cells and extending in a second direction, the second conductive line extending between adjacent memory cells of a second group of memory cells including the at least one memory cell of the first group of memory cells;
a passive material between the at least one memory cell and the first conductive line, the passive material coextensive with the first conductive line; and
a semimetal material adjacent to the passive material and coextensive with the passive material and the first conductive line and comprising a material selected from the group consisting of a metal silicide and a metal silicon nitride.
2. The semiconductor device of claim 1 , further comprising another passive material between the at least one memory cell and the second conductive line.
3. The semiconductor device of claim 2 , wherein the another passive material comprises a different material composition than the passive material.
4. The semiconductor device of claim 1 , wherein the passive material comprises aluminum oxide.
5. The semiconductor device of claim 1 , wherein a thickness of the passive material is between about 0.5 nm and about 10 nm.
6. The semiconductor device of claim 1 , wherein the passive material directly contacts the first conductive line.
7. The semiconductor device of claim 1 , wherein the passive material directly contacts memory cells of the array of memory cells.
8. The semiconductor device of claim 1 , wherein the semimetal material comprises tungsten silicon nitride (WSiN).
9. The semiconductor device of claim 1 , wherein the semimetal material includes a same metal as the first conductive line.
10. The semiconductor device of claim 9 , wherein the semimetal material has a thickness greater than a thickness of the passive material.
11. The semiconductor device of claim 1 , wherein the memory cells each comprise a stack comprising a memory material.
12. The semiconductor device of claim 11 , wherein the stack further comprises aluminum oxide proximate the memory material.