Directional selective junction clean with field polymer protections
Described is a process to clean up junction interfaces for fabricating semiconductor devices involving forming low-resistance electrical connections between vertically separated regions. An etch can be performed to remove silicon oxide on silicon surface at the bottom of a recessed feature. Described are methods and apparatus for etching up the bottom oxide of a hole or trench while minimizing the effects to the underlying epitaxial layer and to the dielectric layers on the field and the corners of metal gate structures. The method for etching features involves a reaction chamber equipped with a combination of capacitively coupled plasma and inductive coupled plasma. CH x F y gases and plasma are used to form protection layer, which enables the selectively etching of bottom silicon dioxide by NH 3 —NF 3 plasma. Ideally, silicon oxide on EPI is removed to ensure low-resistance electric contact while the epitaxial layer and field/corner dielectric layers are—etched only minimally or not at all.
1. A method of etching, the method comprising:
flowing an inductively coupled plasma (ICP) of a gas into a processing volume of a processing chamber to form a polymer layer on a sidewall and a bottom surface of a feature on a substrate, the gas comprising CH x F y ,
the feature located between a first metal gate structure and a second metal gate structure, the bottom surface of the feature comprising a dielectric layer on a top surface of an epitaxial layer, the epitaxial layer having a thickness; and
selectively removing the dielectric layer by flowing a capacitively coupled plasma (CCP) of the gas into the processing volume of the processing chamber, wherein the thickness of the epitaxial layer is decreased by less than about 10 nm.
2. The method of claim 1 , wherein the gas further comprises one or more of argon (Ar), hydrogen (H 2 ), ammonia (NH 3 ), nitrogen trifluoride (NF 3 ), helium (He), nitrogen (N 2 ), oxygen (O 2 ), carbon monoxide (CO), carbon dioxide (CO 2 ), sulfur hexafluoride (SF 6 ), and hydrogen fluoride (HF).
3. The method of claim 2 , wherein the gas flowed to selectively remove the dielectric layer comprises a mixture of ammonia (NH 3 )/nitrogen trifluoride (NF 3 ).
4. The method of claim 1 , wherein the feature has an aspect ratio of a height to width of at least 5:1.
5. The method of claim 1 , wherein the first metal gate structure and the second metal gate structure comprise one or more of a metal gate, a cap layer, and a spacer.
6. The method of claim 1 , wherein the dielectric layer comprises silicon dioxide (SiO 2 ).
7. The method of claim 1 , wherein the polymer layer has a thickness in a range of from about 5 nm to about 25 nm.
8. The method of claim 1 , further comprising stripping the polymer layer with a plasma comprising ammonia (NH 3 ) or a mixture of nitrogen (N 2 )/hydrogen (H 2 ).