Smart semiconductor switch

1. An integrated circuit comprising:

a first part of a semiconductor switch coupled between a supply node and an output node and configured to provide a first current path between the supply node and the output node in accordance with a first drive signal;

a second part of the semiconductor switch coupled between the supply node and the output node and configured to provide a second current path between the supply node and the output node in accordance with a second drive signal;

a drive circuit configured to generate, in response to a switch-on command, the first drive signal and the second drive signal such that the first part of the semiconductor switch and the second part of the semiconductor switch are alternatingly switched on and off, wherein, during an overlap period, both the first part and the second part of the semiconductor switch are in an on-state; and

a first temperature sensor configured to sense the temperature of the first part of the semiconductor switch and a second temperature sensor configured to sense the temperature of the second part of the semiconductor switch,

wherein the drive circuit is configured to generate the first drive signal and the second drive signal dependent on the sensed temperatures of the first and second part of the semiconductor switch.

2. The integrated circuit of claim 1 ,

wherein, in response to the switch-on command, the first drive signal and the second drive signal are periodically switched on for an on-time and off for an off-time.

3. The integrated circuit of claim 2 ,

wherein the on-time of the first drive signal overlaps with the on-time of the second drive signal, and

wherein the off-time of the first drive signal does not overlap with the off-time of the second drive signal.

4. The integrated circuit of claim 1 ,

wherein the drive circuit is configured to generate pulse-width modulated signals as the first drive signal and the second drive signal, the pulse-width modulated signals having a cycle time and a duty cycle.

5. The integrated circuit of claim 4 ,

wherein the duty cycle is greater than 50%.

6. The integrated circuit of claim 5 ,

the first drive signal is shifted by approximately half the cycle time relative to the second drive signal.

7. The integrated circuit of claim 1 ,

wherein the drive circuit is configured to generate, in response to a switch-off command, the first drive signal and the second drive signal such that both the first part and the second part of the semiconductor switch are switched off.

8. The integrated circuit of claim 1 ,

wherein the drive circuit is configured to trigger a switch-off of the semiconductor switch in response to a detected over-temperature or a switch-off command.

9. The integrated circuit of claim 1 ,

wherein the drive circuit is configured to generate the first drive signal and the second drive signal such that while the first part of the semiconductor switch is on, the second part of the semiconductor switch is switched on in response to the temperature of the first part reaching or exceeding a first temperature threshold provided that the temperature of the second part is below a second temperature threshold, and subsequently the first part of the semiconductor switch is switched off.

10. The integrated circuit of claim 9 ,

wherein the drive circuit is configured to generate the first drive signal and the second drive signal such that while the first part of the semiconductor switch is on, the first part of the semiconductor switch is switched off in response to the temperature of the first part reaching or exceeding the first temperature threshold without switching on the second part of the semiconductor switch when the temperature of the second part is not below the second temperature threshold.

11. The integrated circuit of claim 1 ,

wherein the semiconductor switch is integrated in a semiconductor body that includes a cell array comprising a plurality of transistor cells, wherein a first portion of the transistor cells form the first part of the semiconductor switch and a second portion of the transistor cells form the second part of the semiconductor switch.

12. A method comprising:

receiving a switch-on command;

generating, in response to receiving the switch-on command, a first drive signal for a first part of a semiconductor switch and a second drive signal for a second part of the semiconductor switch,

wherein both parts of the semiconductor switch, when switched on, provide a current path between a supply node and an output node, and

wherein the first drive signal and the second drive signal are generated such that the first part of the semiconductor switch and the second part of the semiconductor switch are alternatingly switched on and off, wherein, during an overlap period, both the first part and the second part of the semiconductor switch are in an on-state; and

sensing a temperature of the first part of the semiconductor switch via a first temperature sensor and sensing a temperature of the second part of the semiconductor switch via a second temperature sensor,

wherein generating the first drive signal and the second drive signal is dependent on the sensed temperatures of the first part and second part of the semiconductor switch.

13. The method of claim 12 ,

wherein the switch-on command is represented by a transition from a low-level to a high level, or vice versa, in an input signal.

14. A method comprising:

receiving a switch-on command;

generating, in response to receiving the switch-on command, a first drive signal for a first part of a semiconductor switch and a second drive signal for a second part of a semiconductor switch; and

sensing a first temperature of the first part of the semiconductor switch and a second temperature of the second part of the semiconductor switch,

wherein both parts of the semiconductor switch, when switched on, provide a current path between a supply node and an output node, and

wherein, in response to a switch-on command, the first drive signal and the second drive signal are generated in accordance with a switching scheme, that includes, in response to the first temperature of the first part of the semiconductor switch reaching a first threshold:

switching on the second part of the semiconductor switch provided that the second temperature of the second part is below a second threshold, and

switching off the first part of the semiconductor switch.

15. The method of claim 14 ,

wherein the switching scheme further includes, in response to the second temperature of the second part of the semiconductor switch reaching the first threshold:

switching on the first part or a third part of the semiconductor switch provided that the first temperature of the first part or a third temperature of the third part is below the second threshold, and

switching off the second part of the semiconductor switch.