IP Library Granted Patent US 12,732,185
Granted Patent B2
US 12,732,185 · App. 19/052,116 · Granted Sep 8, 2026

Smart electronic switch

Inventors: Cristian Ionascu (Villach, AT); Christian Djelassi-Tscheck (Villach, AT); Ioan-Alexandru Tranca (Villach, AT); Klaus Hoermaier (Krumpendorf, AT)
Assignee: Infineon Technologies AG
H03K17/687G06F13/4282G06F2213/0002H03K2217/0081
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Quick Facts
Patent No.
US 12,732,185
App. No.
19/052,116
Granted
Sep 8, 2026
Kind
B2
Abstract

Accordingly, a smart switch device is described herein. In one embodiment, the device includes a first supply circuit configured to provide, based on a first supply voltage, an first voltage at a first output node; a second supply circuit configured to provide, based on a second supply voltage, a second voltage at a second output node; and a power management unit configured to provide a third voltage at a third output node based on both, the first supply voltage and the second supply voltage. The first, the second, and the third output nodes are coupled to a buffer capacitor. The device further includes a wakeup circuit configured to detect a wakeup event and further configured to enable the power management unit upon detecting a wakeup event.

Claims (25)

1 . A smart switch comprising:

a first supply circuit configured to provide a first voltage at a first output node based on a first supply voltage;

a second supply circuit configured to provide a second voltage at a second output node based on a second supply voltage;

a power management unit configured to provide a third voltage at a third output node based on both the first supply voltage and the second supply voltage, wherein the first output node, the second output node, and the third output nodes are coupled to a buffer capacitor; and

a wakeup circuit configured to detect a wakeup event and further configured to enable the power management unit upon detecting a wakeup event.

2 . The smart switch of claim 1 ,

wherein the first output node, the second output node, and the third output nodes are coupled to the buffer capacitor via respective diodes.

3 . The smart switch of claim 2 ,

wherein the first supply circuit and the second supply circuit are configured to compensate for a forward voltage of a diode.

4 . The smart switch of claim 1 ,

wherein the buffer capacitor is connected between an internal ground node and an internal supply node at which an internal supply voltage is provided.

5 . The smart switch of claim 1 ,

wherein the wakeup circuit is supplied by an internal supply voltage.

6 . The smart switch of claim 1 , further comprising:

a mode control circuit configured to disable the power management unit upon transition into an idle mode.

7 . The smart switch of claim 6 ,

wherein the mode control circuit is configured to initiate a transition from the idle mode into a normal mode in response to the wakeup circuit detecting the wakeup event.

8 . The smart switch of claim 1 ,

wherein the wakeup event comprises a transient voltage swing in the first supply voltage.

9 . The smart switch of claim 1 ,

wherein the wakeup event comprises an incoming communication from a serial bus, and wherein the incoming communication comprises a select signal received from the serial bus.

10 . The smart switch of claim 1 ,

wherein the wakeup circuit includes a first edge detection circuit configured to detect—as the wakeup event—a first transient voltage swing in the first supply voltage.

11 . The smart switch of any of claim 1 ,

wherein the power management unit is configured to compensate for fast transients occurring on supply lines.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 12, 2025
From: IONASCU, CRISTIAN; DJELASSI-TSCHECK, CHRISTIAN; TRANCA, IOAN-ALEXANDRU; HOERMAIER, KLAUS
To: INFINEON TECHNOLOGIES AG
Reel/Frame 070199/0788 →
Priority Claims (1)
DE 102024108027.2 · Mar 20, 2024 · national
Continuity (1)
Related Publication 20250300654A1 · Sep 25, 2025
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