Processing device, network node, client device, and methods thereof

1. A device comprising:

a processor configured to:

obtain a primary synchronization signal (PSS) generated based on a PSS sequence and a secondary synchronization signal (SSS) generated based on an SSS sequence; and

determine a cell identity (ID) N ID based on the PSS and the SSS, wherein the cell ID N ID satisfies: N ID =N ID,max (2) N ID (1) +N ID (2) , and

wherein N ID (2) is associated with the PSS sequence, and N ID (1) is associated with a first cyclic shift m 0 and a second cyclic shift m 1 of the SSS sequence; and

wherein the first cyclic shift m 0 and the second cyclic shift m 1 satisfy:

m

0

=

g

(

N

ID

,

max

(

2

)

⁢

⌊

N

I

⁢

D

(

1

)

L

′

⌋

+

N

I

⁢

D

(

2

)

)

,

and

⁢

m

1

=

N

I

⁢

D

(

1

)

⁢

mod

⁢

L

′

,

and

wherein:

g is an integer equal to or larger than 1;

L′ is 112;

N ID (1) ∈{0, 1, 2, . . . , N ID,max (1) −1}; and

N ID (2) ∈{0, 1, . . . , N ID,max (2) −1}.

2. The device according to claim 1 , wherein the SSS sequence for the SSS is formed with a first binary sequence corresponding to the first cyclic shift m 0 and a second binary sequence corresponding to the second cyclic shift m 1 , the first binary sequence and the second binary sequence having the same length.

3. The device according to claim 2 , wherein a first generator polynomial of the first binary sequence is g 0 (x)=x 7 +x 4 +1, and a second generator polynomial of the second binary sequence is g 1 (x)=x 7 +x+1.

4. The device according to claim 2 , wherein the processor is configured to detect the first binary sequence by using at least one hypotheses of the first cyclic shift m 0 , and to detect the second binary sequence by using a fast Walsh-Hadamard transform (FWHT) operation.

5. The device according to claim 1 , wherein the processor is configured to determine the N ID (2) based on the PSS and to determine the N ID (1) based on the SSS after a successful detection of the PSS, and wherein the cell ID N ID satisfies: N ID =3N ID (1) +N ID (2) .

6. The device according to claim 1 , wherein the processor is configured to determine the first cyclic shift m 0 and the second cyclic shift m 1 based on the PSS and the SSS, and to determine the cell ID N ID according to the first cyclic shift m 0 and the second cyclic shift m 1 .

7. The device according to claim 1 , wherein the processor is configured to determine the first cyclic shift m 0 by using at least one hypotheses of the first cyclic shift m 0 , and to determine the second cyclic shift m 1 by using a fast Walsh-Hadamard transform (FWHT) operation.

8. The device according to claim 1 , wherein the processor is configured to generate a second SSS sequence based on a first candidate value of the first cyclic shift m 0 and a second candidate value of the second cyclic shift m 1 .

9. The device according to claim 8 , wherein the processor is configured to detect the SSS by correlating the SSS with the generated second SSS sequence.

10. The device according to claim 1 , wherein N ID,max (2) is 3, N ID (2) ∈{0, 1, 2}, N ID,max (1) is 336, and N ID (1) ∈{0, 1, 2, . . . , 335}.

11. The device according to claim 1 , wherein the SSS sequence for the SSS has a length L of 127.

12. The device according to claim 1 , wherein the SSS sequence is represented as d(k), and d(k) satisfies:

d ( k )=1−2(( s 0 (( k+m 0 )mod L )+ s 1 (( k+m 1 )mod L ))mod 2), k= 0,1,2, . . . , L− 1,

and wherein L is a length of the SSS sequence.

13. A device for wireless communication, comprising:

a transceiver configured to receive a primary synchronization signal (PSS) generated based on a PSS sequence and a secondary synchronization signal (SSS) generated based on an SSS sequence; and

a processing device configured to determine a cell identity (ID) N ID based on the PSS and the SSS, wherein the cell ID N ID satisfies: N ID =N ID,max (2) N ID (1) +N ID (2) , and

wherein N ID (2) is associated with the PSS sequence, and N ID (1) is associated with a first cyclic shift m 0 and a second cyclic shift m 1 of the SSS sequence; and

wherein the first cyclic shift m 0 and the second cyclic shift m 1 satisfy:

m

0

=

g

(

N

ID

,

max

(

2

)

⁢

⌊

N

I

⁢

D

(

1

)

L

′

⌋

+

N

I

⁢

D

(

2

)

)

,

and

⁢

m

1

=

N

I

⁢

D

(

1

)

⁢

mod

⁢

L

′

,

and

wherein:

g is an integer equal to or larger than 1;

L′ is 112;

N ID (1) ∈{0, 1, 2, . . . , N ID,max (1) −1}; and

N ID (2) ∈{0, 1, . . . , N ID,max (2) −1}.

14. The device according to claim 13 , wherein the SSS sequence for the SSS is formed with a first binary sequence corresponding to the first cyclic shift m 0 and a second binary sequence corresponding to the second cyclic shift m 1 , the first binary sequence and the second binary sequence having the same length.

15. The device according to claim 14 , wherein a first generator polynomial of the first binary sequence is g 0 (x)=x 7 +x 4 +1, and a second generator polynomial of the second binary sequence is g 1 (x)=x 7 +x+1.

16. The device according to claim 14 , wherein the processing device is configured to detect the first binary sequence by using at least one hypotheses of the first cyclic shift m 0 , and to detect the second binary sequence by using a fast Walsh-Hadamard transform (FWHT) operation.

17. The device according to claim 13 , wherein the processing device is configured to determine the N ID (2) based on the PSS and to determine the N ID (1) based on the SSS after a successful detection of the PSS, and wherein the cell ID N ID satisfies: N ID =3N ID (1) +N ID (2) .

18. The device according to claim 13 , wherein the processing device is configured to determine the first cyclic shift m 0 and the second cyclic shift m 1 based on the PSS and the SSS, and to determine the cell ID N ID according to the first cyclic shift m 0 and the second cyclic shift m 1 .

19. The device according to claim 13 , wherein the processing device is configured to determine the first cyclic shift m 0 by using at least one hypotheses of the first cyclic shift m 0 , and to determine the second cyclic shift m 1 by using a fast Walsh-Hadamard transform (FWHT) operation.

20. The device according to claim 13 , wherein the processing device is configured to generate a second SSS sequence based on a first candidate value of the first cyclic shift m 0 and a second candidate value of the second cyclic shift m 1 .

21. The device according to claim 20 , wherein the processing device is configured to detect the SSS by correlating the SSS with the generated second SSS sequence.

22. The device according to claim 13 , wherein N ID,max (2) is 3, N ID (2) ∈{0, 1, 2}, N ID,max (1) is 336, and N ID (1) ∈{0, 1, 2, . . . , 335}.

23. The device according to claim 13 , wherein the SSS sequence for the SSS has a length L of 127.

24. The device according to claim 13 , wherein the SSS sequence is represented as d(k), and d(k) satisfies:

d ( k )=1−2(( s 0 (( k+m 0 )mod L )+ s 1 (( k+m 1 )mod L ))mod 2), k= 0,1,2, . . . , L− 1,

wherein L is a length of the SSS sequence.

25. A non-transitory computer readable medium, comprising computer instructions that, when executed by a processor, cause the processor to:

receive a primary synchronization signal (PSS) generated based on a PSS sequence and a secondary synchronization signal (SSS) generated based on an SSS sequence; and

determine a cell identity (ID) N ID based on the PSS and the SSS, wherein the cell ID N ID satisfies: N ID =N ID,max (2) N ID (1) +N ID (2) , and

wherein N ID (2) is associated with the PSS sequence, and N ID (1) is associated with a first cyclic shift m 0 and a second cyclic shift m 1 of the SSS sequence; and

wherein the first cyclic shift m 0 and the second cyclic shift m 1 satisfy:

m 0 =g ( N ID,max (2) └N ID (1) /L′┘+N ID (2) ), and

m 1 =N ID (1) mod L ′, and

wherein:

g is an integer equal to or larger than 1;

L′ is 112;

N ID (1) ∈{0, 1, 2, . . . , N ID,max (1) −1}; and

N ID (2) ∈{0, 1, . . . , N ID,max (2) −1}.

26. The non-transitory computer readable medium according to claim 25 , further comprising computer instructions for causing the processor to determine the N ID (2) based on the PSS and to determine the N ID (1) based on the SSS after a successful detection of the PSS, wherein the cell ID N ID satisfies: N ID =3N ID (1) +N ID (2) .

27. The non-transitory computer readable medium according to claim 25 , further comprising computer instructions for causing the processor to determine the first cyclic shift m 0 and the second cyclic shift m 1 based on the PSS and the SSS, and to determine the cell ID N ID according to the first cyclic shift m 0 and the second cyclic shift m 1 .

28. The non-transitory computer readable medium according to claim 25 , further comprising computer instructions for causing the processor to determine the first cyclic shift m 0 by using at least one hypotheses of the first cyclic shift m 0 , and to determine the second cyclic shift m 1 by using a fast Walsh-Hadamard transform (FWHT) operation.

29. The non-transitory computer readable medium according to claim 25 , further comprising computer instructions for causing the processor to detect a first binary sequence of the SSS sequence by using at least one hypotheses of the first cyclic shift m 0 , and to detect a second binary sequence of the SSS sequence by using a fast Walsh-Hadamard transform (FWHT) operation.

30. The non-transitory computer readable medium according to claim 25 , further comprising computer instructions for causing the processor to generate a second SSS sequence based on a first candidate value of the first cyclic shift m 0 and a second candidate value of the second cyclic shift m 1 .

31. The non-transitory computer readable medium according to claim 30 , further comprising computer instructions for causing the processor to detect the SSS by correlating the SSS with the generated second SSS sequence.

32. The non-transitory computer readable medium according to claim 25 , wherein N ID,max (2) is 3, N ID (2) ∈{0, 1, 2}, N ID,max (1) is 336, and N ID (1) ∈{0, 1, 2, . . . , 335}.