Impedance matching network and method
In one embodiment, the present disclosure may be directed to a method for impedance matching. A matching network is positioned between a radio frequency (RF) source and a plasma chamber. The RF source is configured to provide at least two non-zero pulse levels, and the matching network includes at least one electronically variable capacitor (EVC) configured to alter its capacitance to provide a match configuration. For each of the pulse levels, at a regular time interval, the method determines a first parameter value for a first parameter related to the plasma chamber or matching network. For each of the pulse levels, the method carries out a separate matching process based on the determined parameter values for the pulse level.
1. An impedance matching network comprising:
an RF input configured to operably couple to a radio frequency (RF) source, the RF source configured to provide at least two repeating, non-zero pulse levels;
an RF output configured to operably couple to a plasma chamber;
at least one electronically variable capacitor (EVC) configured to alter its capacitance to provide a match configuration; and
a control circuit configured to carry out the operations of:
for each of the pulse levels, at a regular time interval, determining a first parameter value for a first parameter related to the plasma chamber or matching network; and
for each of the pulse levels, carrying out a separate matching process based on the determined parameter values for the pulse level.
2. The matching network of claim 1 wherein each matching process is further based on a reference value, the reference value being different for the different pulse levels.
3. The matching network of claim 2 wherein the reference value is a reflected power value, a reflection coefficient, a time period for ignoring data, or a time period for holding a preset value.
4. The matching network of claim 1 wherein the separate matching processes are carried in sequence one after another, each of the separate matching processes being carried out for a predetermined period of time.
5. The matching network of claim 4 wherein the predetermined period of time is 100 μs.
6. A semiconductor processing tool comprising:
a plasma chamber configured to deposit a material onto a substrate or etch a material from a substrate; and
an impedance matching network operably coupled to the plasma chamber, the matching network comprising:
an RF input configured to operably couple to a radio frequency (RF) source, the RF source configured to provide at least two repeating, non-zero pulse levels;
an RF output configured to operably couple to the plasma chamber;
at least one electronically variable capacitor (EVC) configured to alter its capacitance to provide a match configuration; and
a control circuit configured to carry out the operations of:
for each of the pulse levels, at a regular time interval, determining a first parameter value for a first parameter related to the plasma chamber or matching network; and
for each of the pulse levels, carrying out a separate matching process based on the determined parameter values for the pulse level.
7. The tool of claim 6 wherein each matching process is further based on a reference value, the reference value being different for the different pulse levels.
8. The tool of claim 7 wherein the reference value is a reflected power value, a reflection coefficient, a time period for ignoring data, or a time period for holding a preset value.
9. The tool of claim 6 wherein the separate matching processes are carried in sequence one after another, each of the separate matching processes being carried out for a predetermined period of time.
10. The tool of claim 6 wherein the predetermined period of time is 100 μs.
11. A method for impedance matching comprising:
positioning a matching network between a radio frequency (RF) source and a plasma chamber, wherein:
the RF source is configured to provide at least two non-zero pulse levels; and
the matching network comprises at least one electronically variable capacitor (EVC) configured to alter its capacitance to provide a match configuration;
for each of the pulse levels, at a regular time interval, determining a first parameter value for a first parameter related to the plasma chamber or matching network; and
for each of the pulse levels, carrying out a separate matching process based on the determined parameter values for the pulse level.
12. The method of claim 11 wherein each matching process is further based on a reference value, the reference value being different for the different pulse levels.
13. The method of claim 12 wherein the reference value is a reflected power value, a reflection coefficient, a time period for ignoring data, or a time period for holding a preset value.
14. The method of claim 11 wherein the separate matching processes are carried in sequence one after another, each of the separate matching processes being carried out for a predetermined period of time.
15. The method of claim 14 wherein the predetermined period of time is 100 μs.
16. A method of manufacturing a semiconductor, the method comprising:
placing a substrate in a plasma chamber configured to deposit a material layer onto the substrate or etch a material layer from the substrate;
coupling an impedance matching network between an RF source and the plasma chamber, wherein:
the RF source is configured to provide at least two repeating, non-zero pulse levels; and
the matching network comprises at least one electronically variable capacitor (EVC) configured to alter its capacitance to provide a match configuration; and
performing impedance matching by:
for each of the pulse levels, at a regular time interval, determining a first parameter value for a first parameter related to the plasma chamber or matching network; and
for each of the pulse levels, carrying out a separate matching process based on the determined parameter values for the pulse level.
17. The method of claim 16 wherein each matching process is further based on a reference value, the reference value being different for the different pulse levels.
18. The method of claim 17 wherein the reference value is a reflected power value, a reflection coefficient, a time period for ignoring data, or a time period for holding a preset value.
19. The method of claim 16 wherein the separate matching processes are carried in sequence one after another, each of the separate matching processes being carried out for a predetermined period of time.
20. The method of claim 19 wherein the predetermined period of time is 100 μs.