Semiconductor device including uneven contact in passivation layer and method of manufacturing the same
Provided is a semiconductor device including a substrate, a passivation layer, and a connector. The passivation layer is disposed on the substrate. The connector is embedded in the passivation. An interface of the connector in contact with the passivation layer is uneven, thereby improving the structural stability of the connector. A method of manufacturing the semiconductor is also provided.
1. A method of manufacturing a semiconductor device, comprising:
providing a substrate;
forming a passivation layer on the substrate by a first 3D printing technology, wherein the first 3D printing technology comprises:
ejecting an insulation ink onto the substrate; and
performing a curing step to cure the insulation ink into the passivation layer, wherein after the curing step, the passivation layer forms an opening with an uneven sidewall; and
after forming the passivation layer by the first 3D printing technology, forming a connector in the opening by a second 3D printing technology.
2. The method of manufacturing the semiconductor device according to claim 1 , wherein the opening has a body portion and a protrusion portion, the protrusion portion protrudes from the body portion to the passivation layer.
3. The method of manufacturing the semiconductor device according to claim 2 , wherein a ratio of a height of the body portion and a width of the protrusion portion is 10:4 to 10:1.
4. The method of manufacturing the semiconductor device according to claim 1 , wherein the forming the connector by the second 3D printing technology comprises using a conductive ink, the conductive ink comprises a plurality of metal nanoparticles, and the plurality of metal nanoparticles comprise silver nanoparticles, copper-silver nanoparticles, copper nanoparticles, or a combination thereof.
5. The method of manufacturing the semiconductor device according to claim 4 , wherein the plurality of metal nanoparticles is in direct contact with the passivation layer.
6. The method of manufacturing the semiconductor device according to claim 1 , wherein a material of the passivation layer comprises a hydrophobic material.
7. The method of manufacturing the semiconductor device according to claim 1 , further comprising connecting the substrate to a circuit substrate by a wire bonding or a flip-chip bonding, wherein the connector is electrically connected to the substrate and the circuit substrate.
8. The method of manufacturing the semiconductor device according to claim 1 , further comprising:
forming a first circuit layer between the substrate and the connector; and
forming a second circuit layer on the connector, wherein the connector is electrically connected to the first and second circuit layers.
9. The method of manufacturing the semiconductor device according to claim 1 , further comprising forming an adhesive layer between the connector and the substrate by an additional 3D printing technology, wherein the adhesive layer comprises a self-assembled monolayer.