Granted Patent
B2
US 12,632,715 · App. 16/933,568 · Granted May 19, 2026
ADC compensation using machine learning system
Assignee:
NXP B.V.
View Patent ↗
Loading inventors, assignments & file history…
Abstract
Analog to digital conversion errors caused by non-linearities or other sources of distortion in an analog-to-digital converter are compensated for by use of a machine learning system, such as a neural network. The machine learning system is trained based on simulation or measurement data, which may utilize a reference ADC or a digital training signal representing a reference ADC that has less distortion errors than the analog-to-digital converter. The effect on the analog to digital conversion errors by Process-Voltage-Temperature parameters may be incorporated into the training of the machine learning system.
Claims (10)
1 . An apparatus comprising:
a first analog-to-digital converter (“ADC”) configured to convert an analog signal to a digital signal; and
a machine learning system configured to compensate for analog-to-digital conversion errors produced within circuitry of the first ADC, wherein the machine learning system has been configured by a training phase to compensate for the analog-to-digital conversion errors, wherein during the training phase, the machine learning system is trained using a representation of an output from a second ADC; and
circuitry configured to input a Process-Voltage-Temperature (“PVT”) parameter into the machine learning system, wherein an output of the first ADC varies as a function of a value of the PVT parameter;
wherein the PVT parameter is a temperature.
2 . An apparatus comprising:
a first analog-to-digital converter (“ADC”) configured to convert an analog signal to a digital signal; and
a machine learning system configured to compensate for analog-to-digital conversion errors produced within circuitry of the first ADC, wherein the machine learning system has been configured by a training phase to compensate for the analog-to-digital conversion errors, wherein during the training phase, the machine learning system is trained using a representation of an output from a second ADC; and
circuitry configured to input a Process-Voltage-Temperature (“PVT”) parameter into the machine learning system, wherein an output of the first ADC varies as a function of a value of the PVT parameter;
wherein the PVT parameter is a semiconductor manufacturing related process variation.
Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded Jul 20, 2020
From: VELDHOVEN, ROBERT VAN
To: NXP B.V.
Reel/Frame 053255/0866 →
Continuity (1)
References Cited (65)
US 6177893B1
· Velasquez et al.
· 2001
[cited by applicant]
US 6339390B1
· Velasquez et al.
· 2002
[cited by applicant]
US 6388594B1
· Velasquez et al.
· 2002
[cited by applicant]
US 6453309B1
· Kananen et al.
· 2002
[cited by applicant]
US 6473013B1
· Velasquez et al.
· 2002
[cited by applicant]
US 6690311B2
· Lundin et al.
· 2004
[cited by applicant]
US 7324036B2
· Petre et al.
· 2008
[cited by applicant]
US 7843859B1
· Gregorian et al.
· 2010
[cited by applicant]
US 8009072B2
· Rigby et al.
· 2011
[cited by applicant]
US 9564876B2
· Kim et al.
· 2017
[cited by applicant]
CN 104779779A
· 2015
[cited by applicant]
Schmidt, C. et al., “ADC nonlinearity compensation based on neural networks,” XIII Reunion de Tabajo en Procesamiento de la Informacion y Control, RPIC 2009 (Sep. 2009) 6 pp. (Year: 2009).
[cited by examiner]
Non-final office action dated Apr. 7, 2021 in U.S. Appl. No. 16/933,617.
[cited by applicant]
A. Bernieri et al., “ADC Neural Modeling,” IEEE Transactions on Instrumentation and Measurement, vol. 45, No. 2, Apr. 1996, pp. 627-633.
[cited by applicant]
A. Bernieri et al., “ADC Neural Modeling,” IEEE Instrumentation and Measurement Technology Conference, pp. 789-794, 1995.
[cited by applicant]
A. Baccigalupi et al., “Error Compensation of A/D Converters Using Neural Networks”, IEEE Transactions on Instrumentation and Measurement, vol. 45, No. 2, Apr. 1996, pp. 640-644.
[cited by applicant]
S. Xu et al., “Analog-to-digital Conversion Revolutionized by Deep Learning,” arXiv: Signal Processing, Oct. 2018, 18 pages.
[cited by applicant]
A. Tankimanova et al., “Level-Shifted Neural Encoded Analog-to-Digital Converter,” 2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Dec. 5-8, 2017, pp. 377-380.
[cited by applicant]
Process-Voltage-Temperature (PVT) Variations and Static Timing Analysis, Downloaded Jul. 1, 2020 from http://asic-soc.blogspot.in/2008/03/process-variations-and-static-timing.html, 8 pages.
[cited by applicant]
H. Chanal, “Hardware Implementation of an ADC Error Compensation Using Neural Networks,” 2011 International Workshop on ADC Modelling, Testing and Data Converter Analysis and Design and IEEE 2011 ADC Forum, Jun. 30-Jul.…
[cited by applicant]
Baccigalupi, A., “Error Compensation of A/D Converters Using Neural Networks”, Instrumentation and Measurement Technology Conference 1995, IEEE Proceedings Integrity Intelligent Instrumentation and Control, p. 644, Apr.…
[cited by applicant]
Cao, W., “NeuADC: Neural Network-Inspired Synthesizable Analog-to-Digital Conversion”, IEEE Transctions on Computer-Aided Design of Integrated Circuits and Systems, vol. 39, No. 9, Sep. 2020.
[cited by applicant]
U.S. Appl. No. 16/933,617, filed Jul. 20, 2020, with a title of “Training a Machine Learning System for Adc Compensation”.
[cited by applicant]
Baccigalupi, A., “Error Compensation of A/D Converters Using Neural Networks”, IEEE Transactions on Instrumentation and Measurement, vol. 45, No. 2, Apr. 1996.
[cited by applicant]
Baird, R.T., “Linearity Enhancement of Multi-bit Ae A/D and D/A Converters Using Data Weighted Averaging”, IEEE Transactions on Circuits and Systems II, vol. 42, pp. 753-762, Jul. 1995.
[cited by applicant]
Bernieri, A., “ADC Neural Modeling”, IEEE Transactions on Instrumentation and Measurement, pp. 789-794, Apr. 1995.
[cited by applicant]
Bernieri, A., “ADC Neural Modeling”, IEEE Transactions on Instrumentation and Measurement, vol. 45, No. 2, Apr. 1996.
[cited by applicant]
Black, W.C., “Time-interleaved converter arrays”, IEEE J. Solid-State Circuits, vol. 15, pp. 1022-1029, Dec. 1980.
[cited by applicant]
Bouhedda, M., “FPGA Implementation of Neural Nonlinear ADC-based Temperature Measurement System”, IEEE International Workshop on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications, …
[cited by applicant]
Carley, L.R., “A noise-shaping coder topology for 15+ bit converters,” IEEE J Solid-State Circuits, vol. 24, pp. 267-273, Apr. 1989.
[cited by applicant]
Centurelli, F., “A model for the distortion due to switch on-resistance in sample-and-hold circuits”, IEEE International Symposium on Circuits and Systems, May 21-24, 2006.
[cited by applicant]
Chen, D.K., “Approaches to Realize High Precision Analog-to-Digital Converter Based on Wavelet Neural Network”, Proceedings of the 2007 International Conference on Wavelet Analysis and Pattern Recognition, Beijing, Chin…
[cited by applicant]
Dyer, K.C., “Calibration and Dynamic Matching in Data Converters, Part 1: Linearity calibration and dynamic-matching techniques,” Solid State Circuits Magazine, pp. 46-55, Jun. 22, 2018.
[cited by applicant]
Dyer, K.C., “Calibration and Dynamic Matching in Data Converters, Part 2: Time-interleaved analog-to-digital converters and background-calibration challenges,” Solid State Circuits Magazine, pp. 61-70, Jun. 22, 2018.
[cited by applicant]
El-Masry, T., “High Precision ClockLess ADC Using Wavelet Neural Network”, 2016 28th International Conference on Microelectronics, pp. 365-368, Dec. 17-20, 2016.
[cited by applicant]
Enz, C.C., “Circuit Techniques for Reducing the Effects of Op-Amp Imperfections: Autozeroing, Correlated Double Sampling and Chopper Stabilization,” IEEE J. Solid-State Circuits, vol. 84, Issue 11, pp. 1584-1614, Nov. 1…
[cited by applicant]
Fraz, H., “Characterization of Dynamic Nonlinearity in ADCs using Wavelet Networks,” IEEE 10th Annual Wireless and Microwave Technology Conference, Apr. 20-21, 2009.
[cited by applicant]
Fu, C., “Adaptive Neural Network Filter in Compensation of Time Interleaved AD Converter System,” International Conference on Services Systems, vol. 2, pp. 1027-1030, Aug. 29, 2005.
[cited by applicant]
Gao, X.Z., “Aid Converter Resolution Enhancement Using Neural Networks”, IEEE Instrumentation and Measurement Technology Conference, May 19-21, 1997.
[cited by applicant]
Huiqing, P., “Nonuniform mismatches compensation algorithm for time-interleaved sampling system using neural networks”, The Tenth International Conference on Electronic Measurement & Instruments, Aug. 16-19, 2011.
[cited by applicant]
Haykin, S.,Neural Networks: A Comprehensive Foundation (2nd Edition). ISBN-13: 978-0132733502, ISBN-10: 0132733501, Prentice Hall,1998.
[cited by applicant]
Haykin, S., Neural Networks and learning machines (3rd Edition). ISBN-13: 978-0131471399, ISBN-10: 0131471392, Prentice Hall, Copyright 1999.
[cited by applicant]
Jiang, H., “Chopping in Continuous-Time Sigma-Delta Modulators”, 2017 IEEE International Symposium on Circuits and Systems, Sep. 28, 2017.
[cited by applicant]
Keshavarzi, A., “Technology scaling behavior of optimum reverse body bias for standby leakage power reduction in CMOS IC's,” International Symposium on Low Power Electronics and Design, pp. 252-254, Aug. 17, 1999.
[cited by applicant]
Kingma, J., “ADAM: A Method for Stochastic Optimization”, International Conference on Learning Representations, Dec. 2014.
[cited by applicant]
Leung, B.H., “Multi-bit ΣΔ A/D Converter Incorporating a Novel Class of Dynamic Element Matching Techniques,” IEEE Transactions on Circuits and Systems II, vol. 39, pp. 35-51, Jan. 1992.
[cited by applicant]
McNeil, J.A., “Split-ADC” Digital Background Correction of Open-Loop Residue Amplifier Nonlinearity Errors in a 14b Pipeline ADC, IEEE International Symposium on Circuits and Systems, pp. 1237-1240, May 27-30, 2007.
[cited by applicant]
Murmann, B., “On the Use of Redundancy in Successive Approximation A/D Converters”, Proceedings of International Conference on Sampling Theory and Applications, pp. 556-559, 2013.
[cited by applicant]
Qiu, Y., “A Novel Calibration Method of Gain and Time-skew Mismatches for Time-interleaved ADCs Based on Neural Network”, IEEE MTT-S International Wireless Symposium, May 19-22, 2019.
[cited by applicant]
Razavi, B., “Problem of Timing Mismatch in Interleaved ADCs”, Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, Sep. 9-12, 2012.
[cited by applicant]
Shu, Y., “An Oversampling SAR ADC with DAC Mismatch Error Shaping Achieving 105dB SFDR and 101dB SNDR over 1KHz BW in 55nm CMOS”, ISSCC 2016 / Session 27 / Hybrid and Nyquist Data Converters / 27.2, pp. 459-459, Sep. 13…
[cited by applicant]
Tsividis, Y., “Event-Driven Data Acquisition and Digital Signal Processing—A Tutorial”, IEEE Transactions on Circuits and Systems—II: Express Briefs, vol. 57, No. 8, Aug. 2010.
[cited by applicant]
Van Der Zwan, E.J., “A 0.2mW Cmos ΣΔ Modulator for Speech Coding with 80dB Dynamic Range,” IEEE J. Solid- State Circuits, vol. 31, pp. 1873-1880, Dec. 1996.
[cited by applicant]
Van Veldhoven, R., “Robust Sigma Delta Converters and their application in low-power highly-digitized flexible receivers”, ISBN: 978-94-007-0643-9, Springer, 2011.
[cited by applicant]
Veitch, D., “Wavelet Neural Networks and their application in the study of dynamical systems”, msc thesis, University of New York, Department of Mathematics, Aug. 2005.
[cited by applicant]
Werbos, P., “Beyond Regression: New Tools for Prediction and Analysis in the Behavioral Sciences”, PhD Thesis, Harvard University, Jan. 1974.
[cited by applicant]
Wilamowski, J., “Levenberg-Marquardt Training”, Industrial Electronics Handbook—Intelligent Systems (vol. 5, 2nd Edition). ISBN 9781439802847, CRC Press, 2011.
[cited by applicant]
Xu, H., “A/D Converter Background Calibration Algorithm Based on Neural Network”, 2018 International Conference on Electronics Technology, pp. 1-4, May 23-27, 2018.
[cited by applicant]
Yu, W., “Distortion Analysis of MOS Track-and-Hold Sampling Mixers Using Time-Varying Volterra Series”, IEEE Transactions on Circuits and Systems—II: Analog and Digital Signal Processing, vol. 46, No. 2, Feb. 1999.
[cited by applicant]
Zhang, T., “Use Multilayer Perceptron in Calibrating Multistage Non-linearity of Split Pipelined-ADC”, International Symposium on Circuits and Systems, May 27-30, 2018.
[cited by applicant]
Zhang, T., “Machine Learning Based Prior-Knowledge-Free Calibration for Split Pipelined-SAR ADCs with Open-Loop Amplifiers Achieving 93.7-dB SFDR”, 45th European Solid-State Circuits Conference, Sep. 23-26, 2019.
[cited by applicant]