Semiconductor device and manufacturing method thereof

1. A semiconductor device, comprising:

a memory circuit including:

a word line;

a bit line;

a common line; and

a memory transistor having a gate coupled to the word line, a drain coupled to the bit line and a source coupled to the common line; and

a logic circuit including:

a logic transistor having a gate, a drain and a source, wherein:

the gate of the memory transistor has a gate electrode layer formed on a gate dielectric layer, the gate dielectric layer including a first insulating layer and a first ferroelectric (FE) material layer,

the gate of the logic transistor has a gate electrode layer formed on a gate dielectric layer, the gate dielectric layer including a second insulating layer and a second FE material layer, and

wherein a thickness of the gate electrode layer of the logic transistor is greater than a thickness of the gate electrode layer of the memory transistor.

2. The semiconductor device of claim 1 , wherein a thickness of the first insulating layer is greater than a thickness of the second insulating layer.

3. The semiconductor device of claim 1 , wherein:

the first FE material layer and the second FE material layer are made of a same FE material and have a same thickness.

4. The semiconductor device of claim 1 , wherein the first and second insulating layers are made of one or more layers of SiO 2 , SiN and SiON.

5. The semiconductor device of claim 1 , wherein the gate electrode layer of the memory transistor and the gate electrode layer of the FET are made of polysilicon.

6. The semiconductor device of claim 2 , wherein the thickness of the first insulating layer is in a range from 3 nm to 9 nm and the thickness of the second insulating layer is in a range from 1 nm to 3 nm.

7. The semiconductor device of claim 3 , wherein:

the same FE material is one of PGO, PZT, SBT, SBO, SBTO, SBTN, STO, BTO, BLT, LNO, YMnO 3 , ZrO 2 , zirconium silicate, ZrAlSiO, HfO 2 , hafnium silicate, HfAlO, LaAlO, lanthanum oxide, HfO 2 doped with Si and Ta 2 O 5 .

8. The semiconductor device of claim 3 , wherein:

the same FE material is HfO 2 doped with Si.

9. The semiconductor device of claim 3 , wherein the same thickness is in a range from 1 nm to 300 nm.

10. A semiconductor device, comprising:

a memory field effect transistor having a gate; and

a logic transistor having a gate, wherein:

the gate of the memory field effect transistor comprises:

a first insulating layer disposed over a substrate;

a first ferroelectric material layer disposed over the first insulating layer; and

a first gate electrode layer disposed over the first ferroelectric material layer, and

the gate of the logic transistor comprises:

a second insulating layer disposed over the substrate;

a second ferroelectric material layer disposed over the second insulating layer; and

a second gate electrode layer disposed over the second ferroelectric material layer,

wherein a thickness of the second gate electrode layer is greater than a thickness of the first gate electrode layer.

11. The semiconductor device of claim 10 , further comprising:

a first conductive layer disposed over the first ferroelectric layer; and

a second conductive layer disposed over the second ferroelectric layer.

12. The semiconductor device of claim 10 , wherein the first ferroelectric material layer and the second ferroelectric material layer are made of a same ferroelectric material and have a same thickness.

13. The semiconductor device of claim 10 , wherein a thickness of the first insulating layer is smaller than a thickness of the second insulating layer.

14. The semiconductor device of claim 10 , wherein the first and second insulating layers are made of one or more layers of silicon oxide, silicon nitride, and silicon oxynitride.

15. The semiconductor device of claim 12 , wherein:

the same ferroelectric material is one of PGO, PZT, SBT, SBO, SBTO, SBTN, STO, BTO, BLT, LNO, YMnO 3 , ZrO 2 , zirconium silicate, ZrAlSiO, HfO 2 , hafnium silicate, HfAlO, LaAlO, lanthanum oxide, HfO 2 doped with Si, and Ta 2 O 5 .

16. A semiconductor device, comprising:

a first field effect transistor having a gate, a drain, and a source; and

a second field effect transistor having a gate, a drain and a source, wherein:

the gates of the first and second transistors each comprise:

an insulating layer disposed over a substrate;

a ferroelectric material layer disposed over the insulating layer; and

a gate electrode layer disposed over the ferroelectric material layer,

wherein the insulating layer of the first field effect transistor is thinner than the insulating layer of the second field effect transistor and the gate electrode layer of the first field effect transistor is thinner than the gate electrode layer of the second field effect transistor.

17. The semiconductor device of claim 16 , wherein a channel length of the first field effect transistor is greater than a channel length of the second field effect transistor.

18. The semiconductor device of claim 16 , wherein the first field effect transistor is a memory transistor and the second field effect transistor is a logic transistor.

19. The semiconductor device of claim 16 , wherein the first ferroelectric material layer and the second ferroelectric material layer are made of a same ferroelectric material and have a same thickness.

20. The semiconductor device of claim 19 , wherein:

the same ferroelectric material is one of PGO, PZT, SBT, SBO, SBTO, BTN, STO, BTO, BLT, LNO, YMnO 3 , ZrO 2 , zirconium silicate, ZrAlSiO, HfO 2 , hafnium silicate, HfAlO, LaAlO, lanthanum oxide, HfO 2 doped with Si, and Ta 2 O 5 .