Semiconductor devices with string select channel for improved upper connection
A semiconductor device includes; gate layers stacked on a substrate, a channel layer extending through the gate layers, a string select gate layer disposed on the channel layer and a string select channel layer extending through the string select gate layer to contact the channel layer. The string select channel layer includes a first portion below the string select gate layer including a first protruding region, a second portion extending through the string select gate layer, and a third portion above the string select gate layer including a second protruding region.
1. A semiconductor device comprising:
an alternating arrangement of gate layers and interlayer dielectric layers stacked on a substrate;
a channel structure vertically extending through the alternating arrangement of gate layers and interlayer dielectric layers;
a string select gate layer disposed on the channel structure; and
a string select channel layer vertically extending through the string select gate layer to contact the channel structure, wherein:
the string select channel layer includes:
a first portion below the string select gate layer;
a second portion extending through the string select gate layer, and
a third portion above the string select gate layer; and
at least one of the first portion and the third portion includes a protruding region,
a lower surface of the first portion of the string select channel layer is disposed lower than upper surfaces of the channel structure,
the first portion includes a pedestal protruding region including a lower pedestal part seated between inner side surfaces of the channel structure and an upper pedestal part disposed on the lower pedestal part,
the lower pedestal part has a first region width, and
the upper pedestal part has a second region width less than the first region width and greater than a width of the first portion of the string select channel layer contacting the second portion of the string select channel layer.
2. The semiconductor device of claim 1 , wherein the first portion includes:
a first protruding region having a first width greater than a second width of an upper part of the first portion contacting the second portion, and
a third width of a lower part of the first portion contacting the channel structure.
3. The semiconductor device of claim 2 , wherein the third portion includes a second protruding region having a fourth width greater than a fifth width of a lower part of the third portion contacting the second portion.
4. The semiconductor device of claim 3 , further comprising a string select channel pad seated between inner side surfaces of the third portion of the string select channel layer and disposed in the second protruding region.
5. The semiconductor device of claim 4 , wherein the string select channel pad includes a portion extending downwardly from the second protruding region.
6. The semiconductor device of claim 1 , wherein:
the second portion of the string select channel layer extends through a hole formed through the string select gate layer, and
the second portion has a width less than a width of the hole.
7. The semiconductor device of claim 6 , further comprising a string select gate insulating layer surrounding the second portion of the string select channel layer in the hole.
8. The semiconductor device of claim 1 , wherein the first portion includes a plug protruding region including:
a lower part seated between inner side surfaces of the channel structure;
a middle part disposed on the lower part and overlapping upper surfaces of the channel structure; and
an upper part disposed on the middle part.
9. The semiconductor device of claim 8 , wherein:
the lower part has a first region width,
the middle part has a second region width greater than the first region width, and
the upper part has a third region width less than the second region width and greater than a width of the first portion of the string select channel layer contacting the second portion of the string select channel layer.
10. The semiconductor device of claim 9 , wherein:
the channel structure includes a channel layer, and
a lower surface of the middle part of the plug protruding region contacts an upper surface of the channel layer.
11. The semiconductor device of claim 1 , further comprising a peripheral circuit region disposed below the substrate and including a base substrate and circuit elements disposed on the base substrate.
12. A semiconductor device comprising:
gate layers stacked on a substrate;
a channel layer extending through the gate layers;
a string select gate layer disposed on the channel layer; and
a string select channel layer extending through the string select gate layer to contact the channel layer, wherein:
the string select channel layer includes:
a first portion below the string select gate layer including a first protruding region;
a second portion extending through the string select gate layer; and
a third portion above the string select gate layer including a second protruding region,
a lower surface of the first portion of the string select channel layer is disposed lower than upper surfaces of the channel layer,
the first portion includes a pedestal protruding region including a lower pedestal part seated between inner side surfaces of the channel layer and an upper pedestal part disposed on the lower pedestal part,
the lower pedestal part has a first region width, and
the upper pedestal part has a second region width less than the first region width and greater than a width of the first portion of the string select channel layer contacting the second portion of the string select channel layer.
13. The semiconductor device of claim 12 , wherein:
the first protruding region has a first width greater than a second width of an upper part of the first portion contacting the second portion, and
a third width of a lower part of the first portion contacting the channel layer.
14. The semiconductor device of claim 13 , wherein the second protruding region has a fourth width greater than a fifth width of a lower part of the third portion contacting the second portion.
15. The semiconductor device of claim 12 , wherein a lower surface of the first portion of the string select channel layer is disposed lower than upper surfaces of the channel layer.
16. A semiconductor device comprising:
gate layers stacked on a substrate;
a channel structure including a channel layer extending through the gate layers; and
a string select gate layer disposed on the channel structure and including a string select channel layer extending through the string select gate layer to contact the channel layer, wherein:
the string select channel layer includes:
a first portion below the string select gate layer including a first protruding region having a first width;
a second portion extending through the string select gate layer; and
a third portion above the string select gate layer including a second protruding region having a second width greater than the first width,
a lower surface of the first portion of the string select channel layer is disposed lower than upper surfaces of the channel structure,
the first portion includes a pedestal protruding region including a lower pedestal part seated between inner side surfaces of the channel structure and an upper pedestal part disposed on the lower pedestal part,
the lower pedestal part has a first region width, and
the upper pedestal part has a second region width less than the first region width and greater than a width of the first portion of the string select channel layer contacting the second portion of the string select channel layer.
17. The semiconductor device of claim 16 , wherein the first protruding region is one of a pedestal protruding region and a plug protruding region.