Insulated gated field effect transistor structure having shielded source and method

1. A semiconductor device structure, comprising:

a region of semiconductor material comprising a first conductivity type and having a first major surface;

a first body region of a second conductivity type opposite to the first conductivity type in the region of semiconductor material, wherein the first body region comprises:

a first stripe region;

a first segment in the first stripe region and having a first peak dopant concentration; and

a second segment in the first stripe region laterally adjacent to the first segment, adjacent to the first major surface, and having a second peak dopant concentration less than the first peak dopant concentration;

a first source region of the first conductivity type in the first segment of the first body region but not in at least part of the second segment; and

an insulated gate electrode adjoining the first segment and configured to provide a first channel region in the first segment, adjoining the second segment and configured to provide a second channel region in the second segment, and adjoining the first source region.

2. The semiconductor device structure of claim 1 , further comprising:

a first conductive structure electrically connected to the first segment, the second segment, and the first source region; and

a ballast resistor electrically connected to the first source region, wherein the ballast resistor is electrically insulated from the first conductive structure.

3. The semiconductor device structure of claim 2 , wherein:

the ballast resistor comprises a doped region of the first conductivity type in the second segment of first body region.

4. The semiconductor device structure of claim 1 , wherein:

the first segment extends into the region of semiconductor material to a first depth;

the second segment extends into the region of semiconductor material to a second depth;

the first channel region is configured to form at a first threshold voltage; and

the second channel region is configured to form at a second threshold voltage that is less than the first threshold voltage.

5. The semiconductor device structure of claim 1 , wherein:

the insulated gate electrode comprises:

a trench extending from the first major surface into the region of semiconductor material;

a shield dielectric layer along a lower part of the trench;

a shield electrode adjacent to the shield dielectric layer; and

a gate electrode in an upper part of the trench, the gate electrode electrically isolated from the region of semiconductor material and the shield electrode.

6. The semiconductor device structure of claim 1 , further comprising

a second body region in the region of semiconductor material and laterally spaced apart from the first body region, the second body region comprising:

the second conductivity type;

a second stripe region generally parallel to the first stripe region;

a second body region first segment in the second stripe region and having a third peak dopant concentration; and

a second body region second segment in the second stripe region laterally adjacent to the second body region first segment and having a fourth peak dopant concentration less than the third peak dopant concentration; and

a second source region of the first conductivity type in the second body region first segment but not in at least part of the second body region second segment.

7. The semiconductor device structure of claim 1 , wherein:

the first segment of the first body region has a first lateral width in a cross-sectional view along a length of the first body region; and

the second segment of the first body region has a second lateral width in the cross-sectional view that is less than the first lateral width.

8. The semiconductor device structure of claim 1 , wherein:

the first peak dopant concentration is about 1.25 to 2 times greater than the second peak dopant concentration.

9. The semiconductor device structure of claim 1 , wherein:

the first body region comprises a third segment laterally interposed between the first segment and the second segment; and

the third segment comprises a third peak dopant concentration less than the first peak dopant concentration and greater than the second peak dopant concentration.

10. The semiconductor device structure of claim 9 , wherein:

the first source region laterally extends into at least part of the third segment.

11. A semiconductor device structure, comprising:

a region of semiconductor material comprising a first conductivity type and having a first major surface;

a first body region of a second conductivity type opposite to the first conductivity type in the region of semiconductor material, wherein the first body region comprises:

a first body region first segment having a first peak dopant concentration; and

a first body region second segment laterally adjacent to the first body region first segment and adjacent to the first major surface having a second peak dopant concentration less than the first peak dopant concentration;

a first source region of the first conductivity type in the first body region first segment but not in at least part of the first body region second segment;

an insulated gate electrode adjacent to the region of semiconductor material adjoining the first body region first segment, the first body region second segment, and the first source region;

a first conductive structure electrically connected to the first body region first segment and the first source region; and

a first ballast resistor electrically connected to the first source region, wherein the first ballast resistor is electrically insulated from the first conductive structure.

12. The semiconductor device structure of claim 11 , wherein:

the ballast resistor comprises:

a doped region of the first conductivity type in the first body region second segment;

the first body region second segment has a first width in a top plan view;

the doped region has a second width in the top plan view; and

the second width is less than the first width.

13. The semiconductor device structure of claim 11 , wherein:

the insulated gate electrode comprises:

a trench extending from the first major surface into the region of semiconductor material;

a shield dielectric layer in a lower part of the trench;

a shield electrode adjacent to the shield dielectric layer; and

a gate electrode in an upper part of the trench, the gate electrode electrically isolated from the region of semiconductor material and the shield electrode.

14. The semiconductor device structure of claim 11 , wherein:

the first body region comprises a first stripe region; and

the semiconductor device structure further comprises:

a second body region in the region of semiconductor material laterally spaced apart from the first body region, the second body region comprising:

a second stripe region generally parallel to the first stripe region;

a second body region first segment in the second stripe region and having a third peak dopant concentration; and

a second body region second segment in the second stripe region and having a fourth peak dopant concentration less than the third peak dopant concentration;

a second source region of the first conductivity type in the second body region first segment and laterally offset with respect to the first source region in a top plan view; and

a second ballast resistor electrically connected to the second source region;

the second ballast resistor is electrically insulated from the first conductive structure; and

the second ballast resistor comprises a doped region of the first conductivity type in the second body region second segment.

15. The semiconductor device structure of claim 11 , wherein:

the first body region first segment extends into the region of semiconductor material to a first depth;

the first body region second segment extends into the regions of semiconductor material to a second depth that is different than the first depth;

the first body region first segment has a first lateral width in a cross-sectional view along a length of the first body region; and

the first body region second segment has a second lateral width less than the first width.

16. The semiconductor device structure of claim 11 , wherein:

the first peak dopant concentration is from about 1.25 to about 2 times greater than the second peak dopant concentration.

17. A method of forming a semiconductor device, comprising:

providing a region of semiconductor material having at least a portion comprising a first conductivity type and having a first major surface;

providing a first body region of a second conductivity type opposite to the first conductivity type in the region of semiconductor material, wherein the first body region comprises:

a first body region first segment having a first peak dopant concentration; and

a first body region second segment laterally adjacent to the first body region first segment and adjacent to the first major surface having a second peak dopant concentration less than the first peak dopant concentration;

providing a first source region of the first conductivity type in the first body region first segment but not disposed in at least a portion of the first body region second segment;

providing an insulated gate electrode, wherein the insulated gate electrode adjoins the first body region first segment, the first body region second segment, and the first source region;

providing a first conductive structure electrically connected to the first body region first segment and the first source region; and

providing a first ballast resistor electrically connected to the first source region, wherein the first ballast resistor is electrically insulated from the first conductive structure.

18. The method of claim 17 , wherein:

providing the first ballast resistor comprises:

providing a doped region of the first conductivity type in the first body region second segment.

19. The method of claim 17 , wherein:

providing the first body region comprises a providing first stripe region; and

the method further comprises:

providing a second body region in the region of semiconductor material laterally spaced apart from the first region, the second body region comprising:

a second stripe region generally parallel to the first stripe region;

a second body region first segment having a third peak dopant concentration; and

a second body region second segment having fourth peak dopant concentration that is less than the third peak dopant concentration;

providing a second source region of the first conductivity type in the second body region first segment and laterally offset with respect to the first source region in a top plan view;

providing the first conductive structure comprises providing the first conductive structure electrically connected to the second body region first segment and the second source region, and

providing a second ballast resistor electrically connected to the second source region, wherein the second ballast resister is electrically insulated from the first conductive structure.

20. The method of claim 17 , wherein:

providing the insulated gate electrode comprises:

providing a trench extending from the first major surface into the region of semiconductor material;

providing a shield dielectric layer in a lower part of the trench;

providing a shield electrode adjacent to the shield dielectric layer; and

providing a gate electrode in an upper part of the trench, the gate electrode electrically isolated from the region of semiconductor material and the shield electrode.