Methods and apparatus for a successive approximation register analog-to-digital converter

1. A calibration circuit configured to connect to a set of analog-to-digital converters (ADCs) and receive an ADC output code from each ADC, comprising:

a first calibration sub-circuit configured to perform a first calibration that compensates for a first error type that is shared among each ADC output code and comprising:

a logic circuit configured to initiate the first calibration in response to a start signal;

a first control circuit in communication with the logic circuit and configured to generate a subtracted code according to a switching point code and the ADC output code;

a counter in communication with the logic circuit and configured to determine a code count based on the subtracted code;

a missing code generator in communication with the logic circuit and configured to determine a missing code count based on the code count and an average code count; and

a weight generator in communication with the logic circuit and configured to assign a weight to the missing code count and correct the ADC output code according to the assigned weight; and

a second calibration sub-circuit connected to the first calibration sub-circuit and configured to perform a second calibration that compensates for a second error type that occurs among different ADC output codes.

2. The calibration circuit according to claim 1 , wherein the logic circuit is further configured to generate a plurality of operation signals, wherein the plurality of operation signals comprise:

an enable signal generated in response to receiving the start signal; and

a completion signal generated in response to completing performance of the first calibration.

3. The calibration circuit according to claim 1 , wherein the first control circuit is further configured to receive the ADC output code and comprises:

a subtraction circuit configured to select one of a plurality of switch control codes based on the switching point code and subtract the one of the plurality of switch control codes from the ADC output code to generate the subtracted code, wherein the plurality of switch control codes are each represented as a digital value based on the switching point code.

4. The calibration circuit according to claim 1 , wherein the counter is in communication with the first control circuit and further configured to receive an enable signal and determine the code count based on the enable signal and the subtracted code.

5. The calibration circuit according to claim 1 , wherein the missing code generator comprises:

a comparator configured to compare the code count to the average code count to determine the missing_code_count; and

a register configured to store the missing_code_count according to the switching point code.

6. The calibration circuit according to claim 1 , wherein the weight generator is further configured to retrieve a plurality of missing code counts from a plurality of registers, compute a plurality of weights based on the plurality of missing code counts, compute a total weight by summing the computed plurality of weights, and subtract the computed total weight from the ADC output code.

7. A method for calibrating ADC output codes from a set of analog-to-digital converters (ADCs), comprising:

performing a first calibration on each ADC output code to compensate for a first error type, comprising:

generating a subtracted code according to a switching point code and the ADC output code;

determining a code count based on the subtracted code;

determining a missing_code_count based on the code count and an average code count; and

assigning a weight to the missing_code_count and correct the ADC output code according to the assigned weight;

performing a second calibration on each ADC output code to compensate for a second error type that occurs among different ADC output codes; and

generating a corrected ADC output code according to the first and second calibrations.

8. The method according to claim 7 , wherein:

the first error type is common among all ADC output codes; and

the second error type occurs among different ADC output codes.

9. The method according to claim 7 , wherein performing the first calibration further comprises:

receiving the ADC output code; and

selecting one of a plurality of switch control codes based on the switching point code and subtracting the one of the plurality of switch control codes from the ADC output code to generate the subtracted code, wherein the plurality of switch control codes are each represented as a digital value based on the switching point code.

10. The method according to claim 7 , wherein performing the first calibration further comprises receiving an enable signal and determining the code count based on the enable signal and the subtracted code.

11. The method according to claim 7 , wherein performing the first calibration further comprises:

comparing the code count to the average code count to determine the missing code count; and

storing the missing code count according to the switching point code.

12. The method according to claim 7 , wherein the performing the first calibration further comprises retrieving a plurality of missing code counts from a plurality of registers, computing a plurality of weights based on the plurality of missing code counts, computing a total weight by summing the computed plurality of weights, and subtracting the computed total weight from the ADC output code.

13. The method according to claim 7 , wherein the performing the second calibration on each ADC output code comprises: compensating for random mismatch by randomizing the ADC output codes around a switching point.

14. The method according to claim 13 , wherein randomizing the ADC output codes around the switching point comprises:

comparing a total ADC code length to:

a predetermined first value;

a predetermined second value; and

a predetermined third value;

computing a difference value between the total ADC code length and the predetermined first value;

adding a random number to the total ADC code length if the total ADC code length is:

less than the first value; and

greater than or equal to the second value; and

subtracting the second random number from the total ADC code length if the total ADC code length is:

greater than the first value; and

less than or equal to the third value;

wherein the random number is in the range of zero to the computed difference value.

15. A system, comprising:

a set of analog-to-digital converters (ADCs) wherein each ADC generates an ADC output code; and

a calibration circuit connected to the set of ADCs and configured to receive the ADC output code from each ADC, wherein the calibration circuit comprises:

a first calibration sub-circuit configured to perform a first calibration on each ADC output code to compensate for a first error type, the first calibration comprising:

generating a subtracted code according to a switching point code and the ADC output code;

determining a code count based on the subtracted code;

determining a missing_code_count based on the code count and an average code count; and

assign a weight to the missing_code_count and correct the ADC output code according to the assigned weight; and

a second calibration sub-circuit connected to the first calibration sub-circuit and configured to perform a second calibration to compensate for a second error type;

wherein the calibration circuit generates a corrected ADC output code for each ADC output code according to the first and second calibrations.

16. The system according to claim 15 , wherein:

the first error type is common among all ADC output codes; and

the second error type occurs among different ADC output codes.

17. The system according to claim 15 , wherein the first calibration further comprises:

receiving the ADC output code; and

selecting one of a plurality of switch control codes based on the switching point code and subtracting the one of the plurality of switch control codes from the ADC output code to generate the subtracted code, wherein the plurality of switch control codes are each represented as a digital value based on the switching point code.

18. The system according to claim 17 , wherein the first calibration further comprises:

determining the code count based on an enable signal and the subtracted code;

comparing the code count to the average code count to determine the missing_code_count;

storing the missing_code_count according to the switching point code; and

retrieving a plurality of missing code counts from a plurality of registers, computing a plurality of weights based on the plurality of missing code counts, computing a total weight by summing the computed plurality of weights, and subtracting the computed total weight from the ADC output code.

19. The system according to claim 15 , wherein the second calibration comprises:

comparing a total ADC code length to:

a predetermined first value; and

a predetermined second value;

computing a difference value between the total ADC code length and the predetermined first value; and

adding a random number to the total ADC code length, wherein the random number is in the range of zero to the computed difference value.

20. The system according to claim 19 , wherein the second calibration further comprises:

comparing the total ADC code length to:

the predetermined first value; and

a predetermined third value; and

computing a difference between the total ADC code length and the predetermined first value; and subtracting a random number to the total ADC code length, wherein the random number is in the range of zero to the computed difference.