IP Library › Granted Patent US 11,609,596
Granted Patent B2
US 11,609,596 · App. 16/983,090 · Granted Mar 21, 2023

Electronic device for controlling frequency of processor and method of operating the same

Inventors: Youngcheol Sin (Gyeonggi-do, KR); Daehyun Cho (Gyeonggi-do, KR)
Assignee: Samsung Electronics Co., Ltd.
G06F1/04
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Quick Facts
Patent No.
US 11,609,596
App. No.
16/983,090
Granted
Mar 21, 2023
Kind
B2
Abstract

An electronic device according to an embodiment includes a display, and a processor including a plurality of cores, wherein the processor is configured to identify a first application satisfying a designated condition related to boosting of the processor among at least one application running on the electronic device, identify a first instruction set architecture (ISA) of the first application, and boost a frequency of a clock signal applied to at least one core among the plurality of cores included in the processor according to the first instruction set architecture.

Claims (42)

1. An electronic device comprising:

a memory;

a display; and

a processor including first, second and third types of cores,

wherein the processor is configured to:

identify a first application satisfying a designated condition related to boosting of the processor among at least one application running on the electronic device;

identify a first instruction set architecture (ISA) of the first application;

identify a first number of one or more applications running on the electronic device and having the first instruction set architecture and a second number of one or more applications running on the electronic device and having a second instruction set architecture different from the first instruction set architecture;

based on a comparison of the first number and the second number, identify, from among a plurality of tables stored in the memory, one of a table corresponding to a type of the first instruction set architecture and another table corresponding to a type of the second instruction set architecture, each of the plurality of tables including performance values, power consumption values and frequency values of the first, second and third types of cores; and

boost a frequency of a clock signal applied to at least one core among the first, second and third types of cores included in the processor to a first frequency using the identified table to execute at least one task of the first application, while another one among the first, second and third types of cores included in the processor executes another task at a second frequency, different from the first frequency, wherein the at least one core has a first performance level, and wherein the another one among the first, second and third types of cores has a second performance level, different from the first performance level,

wherein the plurality of tables provides the performance values and the power consumption values for different frequencies of the clock signal for each of the first, second and third types of cores for each ISA of the first ISA and a second ISA.

2. The electronic device of claim 1 , wherein the processor is configured to:

determine the first frequency for boosting the at least one core according to the first instruction set architecture; and

control the at least one core to be driven using the clock signal having the frequency boosted to the first frequency.

3. The electronic device of claim 1 , wherein the processor is configured to determine an application displayed on top of the display among the at least one application as the first application when the at least one application includes applications having different types of instruction set architecture.

4. The electronic device of claim 3 , wherein the processor is configured to identify the second instruction set architecture of a second application and boost the frequency of the clock signal, based on the second instruction set architecture when the second application is displayed on the top of the display.

5. The electronic device of claim 1 , wherein the processor is configured to determine an application requiring an immediate response among the at least one application as the first application when the at least one application includes applications having different types of instruction set architectures.

6. The electronic device of claim 1 , wherein the processor is configured to determine an application corresponding to a user input received through the display among the at least one application as the first application when the at least one application includes applications having different types of instruction set architectures.

7. The electronic device of claim 1 , wherein the processor is configured to identify an activated window and determine an application corresponding to the activated window among the at least one application as the first application when a plurality of applications are executed in a plurality of windows.

8. The electronic device of claim 1 , wherein the processor is configured to boost the frequency of the clock signal based on the second instruction set architecture different from the first instruction set architecture when the second number is greater than the first number.

9. The electronic device of claim 1 , wherein the first instruction set architecture is 32-bits instruction set architecture or 64-bits instruction set architecture.

10. The electronic device of claim 1 , wherein the designated condition is satisfied when the first application is a keyboard application.

11. A method in an electronic device, the method comprising:

identifying a first application satisfying a designated condition related to a frequency of a clock signal applied to at least one core among first, second and third types of cores included in a processor of the electronic device;

identifying an instruction set architecture (ISA) of the first application;

identifying a first number of one or more applications running on the electronic device and having a first ISA and a second number of one or more applications running on the electronic device and having a second ISA different from the first ISA;

based on a comparison of the first number and the second number, identifying a table from among a plurality of tables, each of the plurality of tables including performance values, power consumption values and frequency values of the first, second and third types of cores, wherein the table is a first table corresponding to a type of the first ISA when the ISA of the first application is the first ISA, wherein the table correlates at least one frequency to a first performance, and a first power consumption, and the table is a second table corresponding to a type of the second ISA when the ISA of the first application is the second ISA, and wherein the second table correlates the at least one frequency to a second performance different from the first performance, and a second power consumption different from the first power consumption; and

determining a frequency value for boosting the frequency of the clock signal, based on the identified table, and

boosting the clock signal of the at least one core among the first, second and third types of cores to the frequency value to execute at least one task of the first application, while executing another task by another one of the first, second and third types of cores at another frequency value;

wherein the designated condition is satisfied when the first application is a keyboard application.

12. The method of claim 11 , further comprising:

identifying the second ISA of a second application when the second application is displayed on top of a display; and

boosting the frequency of the clock signal, based on the second ISA.

13. The method of claim 11 , wherein boosting of the frequency of the clock signal further comprises boosting the frequency of the clock signal based on the second ISA different from the first ISA when the second number of applications is greater than the first.

14. A non-transitory computer-readable recording medium capable of storing a program to execute operations of:

identifying a first application satisfying a designated condition related to boosting of a processor among at least one application running on an electronic device;

identifying a first instruction set architecture (ISA) of the first application;

identifying a first number of one or more applications running on the electronic device and having the first instruction set architecture and a second number of one or more applications running on the electronic device and having a second instruction set architecture different from the first instruction set architecture;

based on a comparison of the first number and the second number, identifying, from among a plurality of tables stored in a memory of the electronic device, one of a table corresponding to a type of the first instruction set architecture and another table corresponding to a type of the second instruction set architecture, each of the plurality of tables including performance values, power consumption values and frequency values of first, second and third types of cores; and

boosting a frequency of a clock signal applied to at least one core among the first, second and third types of cores included in the processor of the electronic device to a first frequency using the identified table to execute at least one task of the first application, while at least another one among the first, second and third types of cores included in the processor executes another task at a second frequency, different from the first frequency, wherein the at least one core has a first performance level, and wherein the at least another one among the first, second and third types of cores has a second performance level, different from the first performance level,

wherein the plurality of tables provide the performance values and the power consumption values for different frequencies of the clock signal for each of the first, second and third types of cores for each ISA of the first ISA and a second ISA.

15. The non-transitory computer-readable recording medium of claim 14 , wherein the designated condition is satisfied when the first application is a keyboard application.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2020
From: SIN, YOUNGCHEOL; CHO, DAEHYUN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 053380/0809 →
Priority Claims (1)
KR 10-2019-0094960 · Aug 5, 2019 · national
Continuity (1)
Related Publication 20210041907A1 · Feb 11, 2021
Cited By (3)
US 12,399,621 US 12,429,932 US 12,608,037