IP Library › Granted Patent US 11,094,810
Granted Patent B2
US 11,094,810 · App. 16/989,802 · Granted Aug 17, 2021

Semiconductor device and manufacturing method of semiconductor device

Inventor: Tatsuya Naito (Matsumoto, JP)
Assignee: FUJI ELECTRIC CO., LTD.
H01L29/7397H01L21/263H01L21/3003H01L21/324H01L21/3223H01L21/3225H01L21/76H01L29/0804H01L29/0834H01L29/0847H01L29/105H01L29/1037H01L29/32H01L29/36H01L29/417H01L29/66348H01L29/739H01L29/8613H01L21/26506
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Quick Facts
Patent No.
US 11,094,810
App. No.
16/989,802
Granted
Aug 17, 2021
Kind
B2
Abstract

There is provided a semiconductor device comprising: a semiconductor substrate; an emitter region of a first conductivity type provided inside the semiconductor substrate; a base region of a second conductivity type provided below the emitter region inside the semiconductor substrate; an accumulation region of the first conductivity type provided below the base region inside the semiconductor substrate, and containing hydrogen as an impurity; and a trench portion provided to pass through the emitter region, the base region and the accumulation region from an upper surface of the semiconductor substrate.

Claims (20)

1. A manufacturing method of a semiconductor device comprising:

forming an impurity region in an upper surface side of a semiconductor substrate, the impurity region including an emitter region of a first conductivity type and a base region of a second conductivity type provided below the emitter region;

forming a trench portion to pass through the emitter region and the base region from an upper surface of the semiconductor substrate; and

forming an accumulation region of the first conductivity type below the base region and entirely above a lower end of the trench portion by implanting protons into the semiconductor substrate, the accumulation region containing hydrogen as an impurity, wherein

a hydrogen concentration of the base region is higher than a doping concentration of a drift region of the first conductivity type provided below the accumulation region.

2. The manufacturing method of a semiconductor device according to claim 1 , further comprising, between forming the impurity region and forming the accumulation region:

forming an insulating film to cover an inner wall of the trench portion;

forming a conductive portion inside the trench portion having the inner wall covered with the insulating film; and

forming an interlayer dielectric film to cover the trench portion on the upper surface of the semiconductor substrate.

3. The manufacturing method of a semiconductor device according to claim 1 , further comprising, between forming the impurity region and forming the accumulation region, forming an emitter electrode above an upper surface of the semiconductor substrate.

4. The manufacturing method of a semiconductor device according to claim 1 , further comprising forming a buffer region of the first conductivity type having a plurality of peaks in a doping concentration distribution in a depth direction of the semiconductor substrate, each peak formed by implanting protons from a lower surface side of the semiconductor substrate, wherein

among the plurality of peaks of the buffer region, a peak located farthest from a lower surface of the semiconductor substrate has a larger doping concentration than a peak located second farthest from the lower surface of the semiconductor substrate.

5. The manufacturing method of a semiconductor device according to claim 1 , further comprising implanting protons into the base region and the accumulation region from a lower surface side of the semiconductor substrate.

6. The manufacturing method of a semiconductor device according to claim 1 , further comprising implanting protons into the base region.

7. The manufacturing method of a semiconductor device according to claim 1 , wherein the forming the accumulation region includes:

implanting protons into the semiconductor substrate from an upper surface side of the semiconductor substrate.

8. The manufacturing method of a semiconductor device according to claim 2 , further comprising:

forming a barrier metal on an entire upper surface of the interlayer dielectric film above the trench portion.

9. The manufacturing method of a semiconductor device according to claim 1 , wherein:

the hydrogen concentration of the base region is higher than a doping concentration of the base region.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2020
From: NAITO, TATSUYA
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 053450/0385 →
Priority Claims (1)
JP JP2016-158694 · Aug 12, 2016 · national
Continuity (3)
Division 16045744 · Jul 26, 2018
Continuation PCTJP2017028853 · Aug 8, 2017
Related Publication 20200373418A1 · Nov 26, 2020
Cited By (1)
US 12,342,608