Semiconductor structure

1. A semiconductor structure, comprising:

a wafer; and

a test structure, disposed on the wafer and comprising:

a first device, comprising a first source/drain layer and a first gate layer disposed above the first source/drain layer; and

a second device, comprising a second source/drain layer and a second gate layer disposed above the second source/drain layer, the second gate layer connected to the first gate layer;

wherein the first gate layer is disposed along a first direction and the second gate layer is disposed along a second direction orthogonal to the first direction;

wherein the first source/drain layer and the second gate layer are separated by a first distance, the second source/drain layer and the first gate layer are separated by a second distance, and the first distance is greater than the second distance;

wherein the first distance is along the first direction and the second distance is along the second direction.

2. The semiconductor structure of claim 1 , wherein the test structure further comprises:

a third device, disposed adjacent to the second device and comprising a third source/drain layer,

wherein the second gate layer is disposed above the third source/drain layer.

3. The semiconductor structure of claim 2 , wherein the first source/drain layer and the second gate layer are separated by the first distance, the second source/drain layer and the third source/drain layer are separated by a third distance, and the first distance is greater than the third distance.

4. The semiconductor structure of claim 3 , wherein the test structure is disposed in a scribe line of the wafer.

5. A semiconductor structure, comprising:

a wafer; and

a test structure, disposed on the wafer and comprising:

a first source/drain layer;

a second source/drain layer; and

a gate layer, comprising a first portion and a second portion, the first portion disposed above the first source/drain layer, and the second portion disposed above the second source/drain layer;

wherein the first portion is disposed along a first direction and the second portion is disposed along a second direction orthogonal to the first direction;

wherein the first source/drain layer and the second portion are separated by a first distance, the second source/drain layer and the first portion are separated by a second distance, and the first distance is greater than the second distance;

wherein the first distance is along the first direction and the second distance is along the second direction.

6. The semiconductor structure of claim 5 , wherein the test structure further comprises:

a third source/drain layer, disposed adjacent to the second source/drain layer,

wherein the second portion of the gate layer is disposed above the third source/drain layer.

7. The semiconductor structure of claim 6 , wherein the first source/drain layer and the second portion are separated by the first distance, the second source/drain layer and the third source/drain layer are separated by a third distance, and the first distance is greater than the third distance.

8. The semiconductor structure of claim 5 , wherein the test structure is disposed in a scribe line of the wafer.

9. A semiconductor structure, comprising:

a wafer, comprising a first scribe line and a second scribe line orthogonal to the first scribe line; and

a test structure, disposed in the first scribe line of the wafer and comprising:

a first device, comprising a first gate layer along a first direction;

a second device, comprising a second gate layer along a second direction orthogonal to the first direction;

a third device, disposed adjacent to the second device; and

wherein the second gate layer is disposed in the third device,

wherein the second gate layer is connected to the first gate layer.