IP Library Granted Patent US 12,361,404
Granted Patent B2
US 12,361,404 · App. 17/017,516 · Granted Jul 15, 2025

Preliminary enablement of transaction processing circuitry

Inventors: David Terra (San Francisco, CA); Koun Han (San Francisco, CA); Michael Wells White (San Francisco, CA); Michael Dahn (San Francisco, CA)
Assignee: Block, Inc.
G06Q20/352G06Q20/341G07F7/0886G07F7/0893
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Quick Facts
Patent No.
US 12,361,404
App. No.
17/017,516
Granted
Jul 15, 2025
Kind
B2
Abstract

A payment terminal includes multiple chips that perform different processing functions within the payment terminal. A terminal chip performs general functionality of the payment terminal while a transaction chip communicates with payment devices such as chip cards and NFC payment devices and processes payment information. The transaction chip may operate in a low power during which communications and processing are limited, and a transaction processing mode in which transactions may be processed. The transaction chip may transfer between these modes based on wake-up messages provided by other devices or circuitry of the payment terminal.

Claims (31)

1. A payment terminal, comprising:

a payment interface configured to receive payment information from a payment device;

a transaction chip configured to operate in a low-power mode and in a transaction processing mode, wherein the transaction chip is configured to exchange the payment information with the payment device during the transaction processing mode, and wherein the transaction chip comprises:

a transaction processing unit coupled to the payment interface, wherein the transaction processing unit is configured to execute one or more first instructions; and

a transaction processing memory configured to store the one or more first instructions; and

a payment terminal chip coupled to the transaction chip, wherein the payment terminal chip comprises:

a terminal processing unit coupled to the transaction processing unit, wherein the terminal processing unit is configured to execute one or more second instructions;

a communication interface; and

a terminal memory configured to store the one or more second instructions that, when executed, cause the terminal processing unit to:

(a) receive a message indicating a condition that must be satisfied prior to the transaction processing unit entering a transaction processing mode, wherein the transaction processing unit is not able to receive electronic payment information until it has entered into the transaction processing mode;

(b) after receiving the message, monitor one or more signals received by the terminal processing unit to determine whether the condition has been satisfied;

(c) determine, based on the one or more signals received by the terminal processing unit, that the condition has been satisfied;

(d) based on a determination that the condition has been satisfied, send a request to the transaction processing unit, wherein the request causes the transaction chip to transition from the low-power mode to the transaction processing mode;

(e) receive the request to process payment; and

(f) transmit the request for payment information to the transaction processing unit.

2. The payment terminal of claim 1 , wherein the determination that the condition has been satisfied comprises one or more of: a determination that a power level of the payment terminal is above a predefined threshold, a determination that a power reserve level in a power supply is above a predefined threshold, a determination that a payment device is likely to interact with an interface of a payment reader; and a determination based on data collected from one or more sensors of the payment terminal.

3. The payment terminal of claim 2 , wherein the one or more sensors of the payment terminal are any of: proximity sensors, infrared sensors, optical sensors, time-of-flight sensors, audio sensors, or video sensors.

4. The payment terminal of claim 1 , wherein the condition that must be satisfied prior to the transaction processing unit entering a transaction processing mode is selected from a plurality of predetermined conditions by the terminal processing unit.

5. The payment terminal of claim 1 , wherein the condition that must be satisfied prior to the transaction processing unit entering a transaction processing mode is determined based on one or more parameters derived, by the terminal processing unit, using at least one data analytics technique.

6. The payment terminal of claim 4 , wherein the plurality of predetermined conditions is updated in accordance with a firmware update of the terminal instructions.

7. The payment terminal of claim 1 , wherein the payment interface comprises:

a chip card interface configured to receive a chip card and exchange the electronic payment information with the chip card, and

a chip card detection circuit coupled to the chip card interface,

wherein the chip card detection circuit causes the message to be sent to the transaction chip when the chip card is inserted into the chip card interface.

8. The payment terminal of claim 1 , wherein the one or more first instructions cause the transaction processing unit to return to the low-power mode if the request for payment information is not received within a threshold period.

9. The payment terminal of claim 8 , further comprising a battery coupled to the transaction chip,

wherein the threshold period is decreased when a power level of the battery falls below a threshold power level.

10. The payment terminal of claim 1 , wherein the payment interface comprises a wireless payment interface configured to communicate wirelessly to exchange the electronic payment information with a wireless payment device.

11. The payment terminal of claim 10 , further comprising a wireless device detection circuit coupled to the terminal processing unit,

wherein the wireless device detection circuit provides the message to the terminal processing unit based on a change in a value of a proximity signal, and

wherein the proximity signal changes its value based on tuning characteristics of the wireless device detection circuit.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE FOURTH ASSIGNOR'S NAME PREVIOUSLY RECORDED AT REEL: 53739 FRAME: 566. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jun 13, 2025
From: TERRA, DAVID; HAN, KOUN; WHITE, MICHAEL WELLS; DAHN, MICHAEL
To: SQUARE, INC.
Reel/Frame 071580/0717 →
CHANGE OF NAME Recorded Jan 6, 2022
From: SQUARE, INC.
To: BLOCK, INC.
Reel/Frame 058661/0801 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2020
From: TERRA, DAVID; HAN, KOUN; WHITE, MICHAEL WELLS; DANH, MICHAEL
To: SQUARE, INC.
Reel/Frame 053739/0566 →
Continuity (2)
Continuation 15197706 · Jun 29, 2016
Related Publication 20200410477A1 · Dec 31, 2020
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