Method and apparatus for enabling multiple return material authorizations (RMAs) on an integrated circuit device

1. An integrated circuit (IC) device configured for multiple return material authorizations (RMAs), the IC device comprising:

an asset disposed on the IC device; and

a return material authorization (RMA) counter fuse comprising a first fuse, a second fuse, and a third fuse, wherein the IC device enters an RMA state that disables access to the asset in response to blowing the first fuse, wherein the IC device enters an OWNED state in response to blowing the second fuse, wherein the IC device blows the second fuse during a time period beginning after the first fuse is blown, and wherein the third fuse is blown during a time period beginning after the first fuse is blown.

2. The IC device of claim 1 , wherein the asset comprises stored instructions, nonvolatile code, or a field programmable gate array circuit design, or a combination thereof.

3. The IC device of claim 1 , wherein the IC device re-enters the RMA state in response to blowing the third fuse.

4. The IC device of claim 1 , wherein the IC device enables access to the asset in response to the IC device leaving the RMA state.

5. The IC device of claim 1 , wherein a status of a fuse on the RMA counter fuse indicates a state of the IC device.

6. The IC device of claim 1 , wherein the IC device indicates an amount of times that the IC device has been in the RMA state based on a status of at least one of the first fuse, the second fuse, or the third fuse.

7. The IC device of claim 1 , wherein the fuses of the RMA counter fuse are configured to be blown by a single entity.

8. The IC device of claim 1 , wherein the first fuse, when blown, disables access to the asset, wherein the asset is owned by a third party.

9. The IC device of claim 1 , wherein at least one fuse of the RMA counter fuse is configured to be blown by a first entity and wherein at least one fuse is configured to be blown by a second entity.

10. The IC device of claim 1 , wherein the IC device is configured to receive the asset while the IC device is in the OWNED state.

11. The IC device of claim 1 , wherein the RMA counter fuse comprises a fourth fuse, a fifth fuse, and a sixth fuse, and wherein the IC device re-enters the OWNED state in response to blowing the fourth fuse, wherein the IC device re-enters the RMA state in response to blowing the fifth fuse, and wherein the IC device re-enters the OWNED state in response to blowing the sixth fuse.

12. The IC device of claim 1 , wherein the IC device is in a PRODUCTION state and a VIRGIN state prior to blowing the first fuse.

13. The IC device of claim 1 , wherein the RMA state corresponds to a DISOWNED state.

14. A tangible, non-transitory, and machine-readable medium comprising machine-readable instructions that, when executed by one or more processors of an integrated circuit (IC) device, cause the one or more processors to perform operations comprising:

receiving a first command to blow a first fuse on the IC device;

blowing the first fuse, wherein blowing the first fuse disables access to one or more assets on the IC device and causes the IC device to enter an RMA state;

receiving a second command to blow a second fuse on the IC device;

blowing the second fuse during a time period beginning after the first fuse is blown, wherein blowing the second fuse enables access to the one or more assets on the IC device and causes the IC device to leave the RMA state and enter an OWNED state, wherein the IC device is configured to receive an additional one or more assets in the OWNED state;

receiving a third command to blow a third fuse on the IC device; and

blowing the third fuse, wherein blowing the third fuse disables access to the one or more assets on the IC device and causes the IC device to re-enter the RMA state.

15. The medium of claim 14 , wherein the machine-readable instructions, when executed by the one or more processors, cause the IC device to leave the OWNED state in response to the one or more processors blowing the first fuse.

16. The medium of claim 14 , wherein the machine-readable instructions, when executed by the one or more processors, cause the one or more processors to perform operations comprising:

receiving a fourth command to blow a fourth fuse on the IC device; and

blowing the fourth fuse, wherein blowing the fourth fuse enables access to the one or more assets on the IC device and causes the IC device to leave the RMA state.

17. A method for configuring an integrated circuit (IC) device for multiple Return Material Authorizations (RMAs), the method comprising:

receiving a first command to blow a first fuse on the IC device;

blowing the first fuse, wherein blowing the first fuse disables access to one or more assets on the IC device and causes the IC device to enter an RMA state;

receiving a second command to blow a second fuse on the IC device;

blowing the second fuse during a time period beginning after the first fuse is blown, wherein blowing the second fuse enables access to the one or more assets on the IC device and causes the IC device to enter an OWNED state;

receiving a third command to blow a third fuse on the IC device; and

blowing the third fuse, wherein blowing the third fuse disables access to the one or more assets on the IC device and causes the IC device to re-enter the RMA state.

18. The method of claim 17 , comprising:

receiving a fourth command to blow a fourth fuse on the IC device; and

blowing the fourth fuse, wherein blowing the fourth fuse enables access to the one or more assets on the IC device and causes the IC device to leave the RMA state.

19. The method of claim 17 performed by the IC device.

20. The method of claim 17 , wherein the IC device is configured to receive one or more additional assets in the OWNED state.