IP Library Granted Patent US 12,103,845
Granted Patent B2
US 12,103,845 · App. 17/075,737 · Granted Oct 1, 2024

Micro-electromechanical system and method for fabricating MEMS having protection wall

Inventors: Jung-Hao Chang (Taoyuan, TW); Weng-Yi Chen (Hsinchu County, TW)
Assignee: UNITED MICROELECTRONICS CORP.
B81C1/00801B81B7/0025H04R7/06H04R19/04H04R31/003B81B2201/0257B81B2203/0127B81B2203/0353H04R2201/003
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Quick Facts
Patent No.
US 12,103,845
App. No.
17/075,737
Granted
Oct 1, 2024
Kind
B2
Abstract

A micro electromechanical system (MEMS) includes a substrate, a semiconductor device and a protection wall. The substrate has a surface. The semiconductor device is disposed on the surface. The protection wall has a poly-silicon layer surrounding the semiconductor device and connecting to the surface.

Claims (41)

1. A micro electromechanical system (MEMS), comprising:

a substrate, having a surface and a rear surface opposite to the surface;

a semiconductor device, disposed on the surface; and

a protection wall having a poly-silicon layer surrounding the semiconductor device and passing through the surface but not electrically contacting to the semiconductor device, wherein there is no electronic element disposed between the surface and the rear surface.

2. The MEMS according to claim 1 , wherein the semiconductor device comprises:

a dielectric layer, disposed on the surface;

a membrane, having at least one vent hole or slit, embedded in the dielectric layer; and

a backplate, disposed on the dielectric layer.

3. The MEMS according to claim 2 , wherein the substrate has a through-hole passing through the substrate.

4. The MEMS according to claim 3 , further comprising:

a first chamber, defined by exposed portions of the membrane and the dielectric layer together with sidewalls of the substrate exposed via the through-hole; and

a second chamber, defined by other exposed portions of the dielectric layer, the membrane, and the backplate, and communicate with the first chamber through the at least one vent hole or slit.

5. The MEMS according to claim 2 , wherein the poly-silicon layer fills a trench extending from a top surface of the dielectric layer to the surface of the substrate.

6. The MEMS according to claim 5 , further comprising a void formed in the trench and enclosed by the poly-silicon layer.

7. The MEMS according to claim 2 , further comprising a dielectric layer covering on the poly-silicon layer, wherein the poly-silicon layer is disposed on a sidewall of a trench extending from a top surface of the dielectric layer to the surface of the substrate.

8. The MEMS according to claim 7 , further comprising a void formed in the trench and enclosed by the dielectric layer.

9. The MEMS according to claim 7 , wherein the dielectric layer comprises silicon nitride.

10. The MEMS according to claim 1 , wherein the protection wall has at least one exposed outer surface.

11. A method for fabricating a MEMS, comprising:

providing a substrate, having a surface and a rear surface opposite to the surface;

forming a semiconductor device on the surface;

forming a protection wall having a poly-silicon layer to make the poly-silicon layer surrounding the semiconductor device and passing through the surface but not electrically contacting to the semiconductor device, wherein there is no electronic element disposed between the surface and the rear surface.

12. The method according to claim 11 , wherein prior to forming the protection wall, the forming of the semiconductor device comprises:

forming a first dielectric material layer on the surface;

forming a membrane having at least one vent hole or slit on the first dielectric layer; and

forming a second dielectric material layer on the membrane.

13. The method according to claim 12 , wherein after forming the protection wall, the forming of the semiconductor device comprises:

forming a conductive layer on the second dielectric material layer;

forming a dielectric protection layer on the conductive layer;

forming a plurality of penetrating openings passing through the dielectric protection layer and the conductive layer;

forming a through-hole passing through the substrate; and

removing portions of the first dielectric material layer and the second dielectric material layer through the through-hole and the at least one vent hole or slit.

14. The method according to claim 12 , wherein the forming of the protection wall comprises:

forming a trench surrounding the semiconductor device and passing through the second dielectric material layer and the first dielectric material layer to expose a portion of the substrate; and

forming the poly-silicon layer at least covering on a sidewall of the trench.

15. The method according to claim 14 , wherein the forming of the protection wall further comprises forming a void enclosed by the poly-silicon layer.

16. The method according to claim 14 , wherein the forming of the protection wall further comprises forming a silicon nitride layer and covering on the poly-silicon layer and filling the trench.

17. The method according to claim 16 , wherein the forming of the protection wall further comprises forming a void enclosed by the dielectric layer.

18. The method according to claim 14 , wherein the trench extends from a top surface of the dielectric layer to the surface of the substrate and exposes the surface there form.

19. The method according to claim 14 , wherein the trench passes through the surface of the substrate and expends into the substrate.

20. The method according to claim 14 , wherein after the portions of the first dielectric material layer and the second dielectric material layer are removed at least one outer surface of the protection wall is exposed.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 21, 2020
From: CHANG, JUNG-HAO; CHEN, WENG-YI
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 054118/0783 →
Continuity (1)
Related Publication 20220119248A1 · Apr 21, 2022
Cited By (1)
US 12,441,606