Systems and methods for designing a module semiconductor product

1. A system configured for designing a multi-chip module, the system comprising:

one or more hardware processors configured by machine-readable instructions to:

use a first interface generated by a computing device to receive from a user a selection of a multi-chip module type;

use the first interface to receive from the user a selection of two or more die;

use the first interface to receive from the user a placement of one or more wires, one or more clips, or one or more pins on a multi-chip module;

generate, using a processor, a module configuration file;

generate, using the processor, a module bonding diagram using a build diagram system module with the module configuration file;

select, using the processor, one or more SPICE models corresponding with the two or more die;

provide, using the processor, the module configuration file, the module bonding diagram, and the one or more SPICE models to a three dimensional simulation module;

generate, using the processor, a product SPICE model that includes module packaging and generate, using the processor, a three dimensional model for the multi-chip module using the three dimensional simulation module;

provide, using the processor, at least the product SPICE model including module packaging to a product simulation module;

generate, using the processor, one or more datasheet characteristics of the multi-chip module with at least the product SPICE model including module packaging and the product simulation module;

provide, using the processor, the one or more datasheet characteristics to a datasheet formation module;

generate, using the processor, a product datasheet for the multi-chip module using the datasheet formation module with at least the module configuration file, the module bonding diagram, and the one or more datasheet characteristics; and

provide access to at least the module bonding diagram, the product SPICE model including module packaging, the three dimensional model, and the product datasheet to the user by generating a second interface with the computing device.

2. The system of claim 1 , wherein the product SPICE model including module packaging comprises die SPICE models, a module packaging parasitic extraction model, and a thermal model including the module packaging.

3. The system of claim 1 , wherein the two or more die are power semiconductor die.

4. The system of claim 1 , wherein the module configuration file is a Java Script Object Notation file.

5. The system of claim 1 , wherein the three dimensional simulation module uses a finite element modeling process to generate the product SPICE model including module packaging of the multi-chip module.

6. The system of claim 1 , wherein the system is configured to, after receiving from the user the selection of two or more die, retrieve a die SPICE model from a die SPICE modeling system.

7. The system of claim 1 , wherein the system is configured to, after receiving from the user the placement of one or more wires, use a processor to use one or more design rules to generate flight lines for the one or more wires in the first interface.

8. The system of claim 1 , wherein the system is configured to, after receiving from the user the placement of one or more pins, use a processor to indicate an acceptable location for the one or more pins in the first interface.

9. The system of claim 1 , wherein the system is configured to use a plurality of bonding design rules with the module configuration file.

10. The system of claim 1 , wherein the system is configured to provide access to a module schematic diagram with the second interface.

11. A method of designing a module semiconductor product, the method comprising:

using a first interface generated by a computing device, receiving from a user a selection of a multi-die module type;

using the first interface, receiving from the user a selection of two or more die;

using the first interface, receiving from the user a placement of one or more wires, one or more clips, or one or more pins;

generating, using a processor, a module configuration file;

generating, using the processor, a module bonding diagram using a build diagram system module with the module configuration file;

selecting, using the processor, one or more SPICE models corresponding with the one or more die;

providing, using the processor, the module configuration file, the module bonding diagram, and the one or more SPICE models to a three dimensional simulation module;

generating, using the processor, a product SPICE model including module packaging and generating a three dimensional model for the module semiconductor product using the three dimensional simulation module;

providing, using the processor, at least the product SPICE model including module packaging to a product simulation module;

generating, using the processor, one or more datasheet characteristics of the module semiconductor product with at least the product SPICE model including module packaging and the product simulation module;

providing, using the processor, the one or more datasheet characteristics to a datasheet formation module;

generating, using the processor, a product datasheet for the module semiconductor product using the datasheet formation module with at least the module configuration file, the module bonding diagram, and the one or more datasheet characteristics; and

providing access to at least the module bonding diagram, the product SPICE model including module packaging, the three dimensional model, and the product datasheet to the user by generating a second interface with the computing device.

12. The method of claim 11 , wherein the product SPICE model including module packaging comprises die SPICE models, a module parasitic extraction model including packaging, and a thermal model including packaging.

13. The method of claim 11 , wherein the two or more die are power semiconductor die.

14. The method of claim 11 , wherein the module configuration file is a Java Script Object Notation file.

15. The method of claim 11 , wherein the three dimensional simulation module uses a finite element modeling process to generate the product SPICE model including module packaging of the module semiconductor product.

16. The method of claim 11 , wherein receiving from the user the selection of one or more die further comprises retrieving a die SPICE model from a die SPICE modeling system.

17. The method of claim 11 , wherein the receiving from the user the placement of one or more wires further comprises, using a processor, using one or more design rules to generate flight lines for the one or more wires in the first interface.

18. The method of claim 11 , wherein the receiving from the user the placement of one or more pins further comprises, using a processor, indicating an acceptable location for the one or more pins in the first interface.

19. The method of claim 11 , wherein generating, using the processor, the module bonding diagram using the build diagram system module further comprises using a plurality of bonding design rules with the module configuration file.

20. The method of claim 11 , wherein providing access to at least the module bonding diagram, the product SPICE model including module packaging, the three dimensional model, and the product datasheet to the user by generating the second interface with the computing device further comprises providing access to a module schematic diagram.