IP Library › Granted Patent US 11,372,160
Granted Patent B2
US 11,372,160 · App. 17/076,795 · Granted Jun 28, 2022

Package, optical device, and manufacturing method of package

Inventors: Hsien-Wei Chen (Hsinchu, TW); Ming-Fa Chen (Taichung, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
G02B6/1225G02B6/4239G02B6/4283G02B2006/1213
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Quick Facts
Patent No.
US 11,372,160
App. No.
17/076,795
Granted
Jun 28, 2022
Kind
B2
Abstract

A package includes a photonic integrated circuit die, an electric integrated circuit die, and an encapsulant. The photonic integrated circuit die includes a semiconductor substrate, an insulation layer, and a waveguide. The semiconductor substrate has a notch. The insulation layer is disposed on the semiconductor substrate. The waveguide is disposed on the insulation layer. The notch of the semiconductor substrate is underneath at least a portion of the waveguide. The electric integrated circuit die is disposed over and electrically connected to the photonic integrated circuit die. The encapsulant laterally encapsulates the electric integrated circuit die.

Claims (42)

1. A package, comprising:

a photonic integrated circuit die, comprising:

a semiconductor substrate having a notch;

an insulation layer disposed on the semiconductor substrate; and

a waveguide disposed on the insulation layer, wherein the notch of the semiconductor substrate is underneath at least a portion of the waveguide;

an electric integrated circuit die disposed over and electrically connected to the photonic integrated circuit die; and

an encapsulant laterally encapsulating the electric integrated circuit die.

2. The package of claim 1 , further comprising a supporting substrate over the electric integrated circuit die and the encapsulant.

3. The package of claim 1 , wherein the photonic integrated circuit die further comprises an etch stop layer sandwiched between the semiconductor substrate and the insulation layer.

4. The package of claim 1 , wherein a height of the notch is equal to a thickness of the semiconductor substrate.

5. The package of claim 1 , wherein a height of the notch is smaller than a thickness of the semiconductor substrate.

6. The package of claim 1 , wherein the photonic integrated circuit die further comprises through vias penetrating through the semiconductor substrate and the insulation layer, wherein the through vias are electrically connected to the electric integrated circuit die.

7. An optical device, comprising:

a circuit substrate; and

a package disposed on the circuit substrate, wherein the package comprises:

a photonic integrated circuit die, comprising:

a semiconductor substrate having a first surface and a second surface opposite to the first surface, wherein the semiconductor substrate comprises a notch;

a insulation layer disposed on the first surface of the semiconductor substrate; and

a waveguide disposed on the insulation layer, wherein a projection of a tip of the waveguide along a direction perpendicular to the first surface of the semiconductor substrate is overlapped with the notch; and

an electric integrated circuit die disposed over and electrically connected to the photonic integrated circuit die.

8. The optical device of claim 7 , wherein the package further comprises a redistribution structure and conductive terminals dispose over the second surface of the semiconductor substrate, and the package is electrically connected to the circuit substrate through the conductive terminals.

9. The optical device of claim 7 , wherein the package further comprises an encapsulant laterally encapsulating the electric integrated circuit die.

10. The optical device of claim 7 , further comprising:

an optical fiber disposed adjacent to the waveguide, wherein the optical fiber is optically coupled to the waveguide; and

a supporting structure disposed on the circuit substrate, wherein the optical fiber is disposed on the supporting structure.

11. The optical device of claim 7 , wherein a width of the notch gradually increases from an edge of the semiconductor substrate toward an interior of the semiconductor substrate.

12. The optical device of claim 7 , wherein a width of the notch gradually decreases from an edge of the semiconductor substrate toward an interior of the semiconductor substrate.

13. The optical device of claim 7 , wherein a width of the notch is uniform.

14. The optical device of claim 7 , wherein the photonic integrated circuit die further comprises an etch stop layer sandwiched between the semiconductor substrate and the insulation layer.

15. The optical device of claim 7 , wherein a height of the notch is equal to a thickness of the semiconductor substrate.

16. The optical device of claim 7 , wherein a height of the notch is smaller than a thickness of the semiconductor substrate.

17. A manufacturing method of a package, comprising:

providing a semiconductor wafer comprising a semiconductor substrate, an insulation layer, waveguides, and an interconnection structure stacked in sequential order;

bonding an electric integrated circuit die to the semiconductor wafer;

laterally encapsulating the electric integrated circuit die by an encapsulant;

forming a redistribution structure over the semiconductor substrate such that the redistribution structure and the insulation layer are located on two opposite sides of the semiconductor substrate;

removing a portion of the semiconductor substrate to form notches in the semiconductor substrate;

forming conductive pads over the redistribution structure; and

forming conductive terminals over the conductive pads.

18. The method of claim 17 , wherein prior to the removal of the portion of the semiconductor substrate, a portion of the redistribution structure is removed.

19. The method of claim 17 , wherein the conductive pads are formed prior to the removal of the portion of the semiconductor substrate.

20. The method of claim 17 , wherein the conductive pads are formed after the removal of the portion of the semiconductor substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 26, 2020
From: CHEN, HSIEN-WEI; CHEN, MING-FA
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 054170/0837 →
Continuity (2)
Provisional Application 62968161 · Jan 31, 2020
Related Publication 20210239904A1 · Aug 5, 2021