IP Library Granted Patent US 11,637,233
Granted Patent B2
US 11,637,233 · App. 17/086,447 · Granted Apr 25, 2023

Semiconductor device and method for fabricating the same

Inventors: Hui-Lin Wang (Taipei, TW); Chen-Yi Weng (New Taipei, TW); Si-Han Tsai (Taichung, TW); Che-Wei Chang (Taichung, TW); Po-Kai Hsu (Tainan, TW); Jing-Yin Jhang (Tainan, TW); Yu-Ping Wang (Hsinchu, TW); Ju-Chun Fan (Tainan, TW); Ching-Hua Hsu (Kaohsiung, TW); Yi-Yu Lin (Taichung, TW); Hung-Yueh Chen (Hsinchu, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H01L43/02H01L27/222H01L43/12H01L43/10
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Quick Facts
Patent No.
US 11,637,233
App. No.
17/086,447
Granted
Apr 25, 2023
Kind
B2
Abstract

A method for fabricating a semiconductor device includes the steps of forming a magnetic tunneling junction (MTJ) on a MRAM region of a substrate, forming a first inter-metal dielectric (IMD) layer around the MTJ, forming a patterned mask on a logic region of the substrate, performing a nitridation process to transform part of the first IMD layer to a nitride layer, forming a first metal interconnection on the logic region, forming a stop layer on the first IMD layer, forming a second IMD layer on the stop layer, and forming a second metal intercom in the second IMD layer to connect to the MTJ.

Claims (13)

1. A semiconductor device, comprising:

a magnetic tunneling junction (MTJ) on a substrate;

a first inter-metal dielectric (IMD) layer around the MTJ;

a nitride layer on the MTJ; and

a stop layer on and directly contacting the nitride layer.

2. The semiconductor device of claim 1 , wherein the substrate comprises a magnetic random access memory (MRAM) region and a logic region, the semiconductor device comprising:

a first metal interconnection on the logic region;

the stop layer on the nitride layer and the first metal interconnection;

a second IMD layer on the stop layer; and

a second metal interconnection in the second IMD layer and connected to the MTJ, wherein the nitride layer is around the second metal interconnection.

3. The semiconductor device of claim 2 , wherein top surfaces of the nitride layer and the first metal interconnection are coplanar.

4. The semiconductor device of claim 1 , wherein the nitride layer comprises a gradient nitrogen concentration.

5. The semiconductor device of claim 1 , wherein a nitrogen concentration of the nitride layer decreases toward the MTJ.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2020
From: WANG, HUI-LIN; WENG, CHEN-YI; TSAI, SI-HAN; CHANG, CHE-WEI; HSU, PO-KAI; JHANG, JING-YIN; WANG, YU-PING; FAN, JU-CHUN; HSU, CHING-HUA; LIN, YI-YU; CHEN, HUNG-YUEH
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 054270/0253 →
Priority Claims (1)
CN 202011058791.5 · Sep 30, 2020 · national
Continuity (1)
Related Publication 20220102621A1 · Mar 31, 2022
Cited By (1)
US 12,354,907