Method for metal gate surface clean
The present disclosure provides a method for forming an integrated circuit (IC) structure. The method includes providing a metal gate (MG), an etch stop layer (ESL) formed on the MG, and a dielectric layer formed on the ESL. The method further includes etching the ESL and the dielectric layer to form a trench. A surface of the MG exposed in the trench is oxidized to form a first oxide layer on the MG. The method further includes removing the first oxide layer using a H 3 PO 4 solution.
1. A method comprising:
forming a dielectric layer over a metal gate and a metal feature, the metal gate having a dielectric sidewall spacer disposed along a sidewall of the metal gate;
removing a first portion of the dielectric layer to expose the metal gate and the metal feature;
forming a first oxide layer on the exposed metal gate after the removing of the portion of the dielectric layer to expose the metal gate and the metal feature;
removing the first oxide layer from the metal gate, wherein the metal gate is recessed with respect to the sidewall spacer after the removing of the first oxide layer;
forming a second oxide layer on the metal gate; and
reducing the second oxide layer to a metal included in the metal gate using a reducing agent.
2. The method of claim 1 , further comprising removing a second portion of the dielectric layer to widen an opening through the dielectric layer after reducing the second oxide layer to the metal.
3. The method of claim 1 , further comprising:
forming a barrier layer directly on the metal gate after reducing the second oxide layer to the metal; and
forming a conductive fill material directly on the barrier layer disposed on the metal gate.
4. The method of claim 1 , wherein forming the barrier layer directly on the metal gate after reducing the second oxide layer to the metal further includes forming the barrier layer directly on the metal feature, and
wherein forming the conductive fill material directly on the barrier layer disposed on the metal gate includes forming the conductive fill material directly on the barrier layer disposed on the metal feature.
5. The method of claim 1 , wherein the metal feature is free of the first oxide layer after the forming of the first oxide layer on the exposed metal gate after the removing of the portion of the dielectric layer to expose the metal gate and the metal feature.
6. The method of claim 1 , wherein the first oxide layer and the second oxide layer have the same material composition.
7. The method of claim 1 , wherein the removing of the first oxide layer from the metal gate includes performing a wet etching process.
8. A method comprising:
forming a metal gate and a metal feature over a substrate;
forming a first dielectric layer over the metal gate and the metal feature;
forming a trench through the first dielectric layer to expose the metal gate and the metal feature;
oxidizing the exposed metal gate to form a first metal oxide layer on the metal gate;
removing the first metal oxide layer to expose the metal gate via a wet etching process;
after removing the first metal oxide layer, oxidizing the exposed metal gate to form forming a second metal oxide layer on the metal gate; and
reducing the second metal oxide layer to a metal included in the metal gate using a reducing agent.
9. The method of claim 8 , further comprising forming an etch stop layer over the metal gate and the metal feature prior to forming the first dielectric layer over the metal gate and the metal feature, and
wherein forming the trench through the first dielectric layer to expose the metal gate and the metal feature includes forming the trench through the etch stop layer.
10. The method of claim 8 , further comprising:
removing a portion of the first dielectric layer through the trench to thereby form an expanded trench;
forming a barrier layer in the expanded trench on the metal gate; and
forming a conductive fill material in the expanded trench on the barrier layer.
11. The method of claim 10 , wherein the removing of the portion of the first dielectric layer through the trench to thereby form the expanded trench includes performing a sputtering process using Ar to remove the portion of the first dielectric layer.
12. The method of claim 8 , wherein the wet etching process includes applying a mixture that includes H 3 PO 4 dissolved in de-ionized water with a concentration in a range from about 5% to about 25%.
13. The method of claim 8 , wherein the reducing agent includes a nitrogen/hydrogen plasma.
14. The method of claim 8 , wherein reducing the second metal oxide layer to a metal included in the metal gate using the reducing agent includes applying a flow rate of the H 2 is in a range from about 100 sccm to about 500 sccm and a flow rate of the N 2 in a range from about 1000 sccm to about 4000 sccm.
15. The method of claim 8 , wherein the metal feature is selected from the group consisting of a metal contact, metal line and metal via.
16. A method comprising:
forming a metal gate over a semiconductor substrate, wherein a first sidewall spacer is disposed along a first side of the metal gate and a second sidewall spacer is disposed along a second side of the metal gate, the second side of the metal gate being opposite the first side of the metal gate;
forming a first dielectric layer on the metal gate;
forming a trench through the first dielectric layer to expose a first portion of the metal gate;
oxidizing the first portion of the metal gate such that the oxidized first portion of the metal gate extends from the first sidewall spacer to the second sidewall spacer;
removing the oxidized first portion of the metal gate to expose a second portion of the metal gate, a first side surface of the first sidewall spacer and a second side surface of the second sidewall spacer;
oxidizing the second portion of the metal gate such that the oxidized second portion of the metal gate extends from the first sidewall spacer to the second sidewall spacer, wherein a portion of the first side surface of the first sidewall spacer remains exposed after the oxidizing of the second portion of the metal gate; and
removing the oxidized second portion of the metal gate to expose a third portion of the metal gate.
17. The method of claim 16 , wherein the first side surface of the first sidewall spacer faces the second side surface of the second sidewall spacer.
18. The method of claim 16 , wherein a portion of the second side surface of the second sidewall spacer remains exposed after the oxidizing of the second portion of the metal gate.
19. The method of claim 16 , further comprising:
performing a sputtering process on portions of the first dielectric layer defining sidewalls of the trench to thereby remove the portions of the first dielectric layer and form an expanded trench;
forming a barrier layer in the expanded trench on the metal gate; and
forming a conductive fill material in the expanded trench on the barrier layer.
20. The method of claim 16 , wherein the oxidized first portion of the metal gate and the oxidized second portion of the metal gate both include aluminum oxide.