Functional prober chip
Systems, devices, and methods for characterizing semiconductor devices and thin film materials. The device consists of multiple probe tips that are integrated on a single substrate. The layout of the probe tips could be designed to match specific patterns on a CMOS chip or sample. The device provides for detailed studies of transport mechanisms in thin film materials and semiconductor devices.
1. A method for manufacturing a CMOS prober chip, the method comprising:
providing a CMOS chip comprising back-end-of-line components, front-end-of-line components, and a plurality of metal contact plugs, wherein the front-end-of-line components comprise a plurality of transistors; and
delayering all of the front-end-of-line components but not including the plurality of metal contact plugs.
2. The method of claim 1 , wherein the delayering comprises chemical mechanical polishing, reactive ion etching, deep reactive ion etching, ion milling, wet chemical etching, and/or a combination thereof.
3. The method of claim 1 , wherein each of the plurality of metal contact plugs is configured to operate as a probe tip.
4. The method of claim 1 , further comprising the recessing an interlayer dielectric around the plurality of metal contact plugs.
5. The method of claim 4 , wherein the recessing an interlayer dielectric around the plurality of metal contact plugs comprises wet chemical etching, reactive ion etching, deep reactive ion etching and/or a combination thereof.
6. The method of claim 3 , further comprising spring loading each probe tip by etching a dielectric layer surrounding the plurality of metal contacts plugs.
7. The method of claim 3 , further comprising depositing a conductive material at an apex of each probe tip.
8. The method of claim 7 , wherein the conductive material is arranged to reversibly deform when in contact with a sample.