IP Library Granted Patent US 11,301,373
Granted Patent B2
US 11,301,373 · App. 17/107,236 · Granted Apr 12, 2022

Reconstruction of address mapping in a host of a storage system

Inventors: Daisuke Hashimoto (Susono, JP); Shigehiro Asano (Yokosuka Kanagawa, JP); Katsuhiko Ueki (Katsushika Tokyo, JP); Mark Hayashida (San Ramon, CA)
Assignee: KIOXIA CORPORATION
G06F12/0246G06F3/061G06F3/064G06F3/0619G06F3/0659G06F3/0679G06F2212/7201
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Quick Facts
Patent No.
US 11,301,373
App. No.
17/107,236
Granted
Apr 12, 2022
Kind
B2
Abstract

A storage device includes a nonvolatile memory including a plurality of physical blocks, a communication interface connectable to a host, and a controller. The controller is configured to generate metadata of host data, which include user data and metadata of the user data, and write, in a physical block of the nonvolatile memory, the metadata of the host data, the metadata of the user data, and the user data continuously in this order, when the host data are received through the communication interface in association with a write command.

Claims (42)

1. A storage device comprising:

a nonvolatile memory including a plurality of physical blocks;

a communication interface connectable to a host; and

a controller configured to:

receive through the communication interface from the host, a first command and host data associated with the first command, the host data including user data to be stored and first metadata relating to the user data, the first metadata including at least a logical address or identifier of the user data and time stamp information;

in response to receiving the first command and the host data, write, into the nonvolatile memory, the received first metadata and the received user data;

receive through the communication interface from the host, a second command after writing the first metadata and the user data; and

in response to receiving the second command, transmit a physical location of the nonvolatile memory in which the user data is written and the first metadata including at least the logical address or identifier of the user data and the time stamp information.

2. The storage device according to claim 1 , wherein the time stamp indicates when the first command was issued.

3. The storage device according to claim 1 , wherein the controller receives the first command and then the host data associated with the first command.

4. The storage device according to claim 1 , wherein the first metadata also includes a size thereof and a size of the user data.

5. The storage device according to claim 1 , wherein the physical location indicates one or more of the plurality of physical blocks.

6. The storage device according to claim 1 , wherein the controller is further configured to:

generate second metadata relating to the received host data, the second metadata being different from the first metadata, the second metadata including metadata relating thereto, metadata relating to the user data, and metadata relating to the first metadata; and

write, in the nonvolatile memory, the generated second metadata, the received first metadata, and the received user data continuously in this order.

7. The storage device according to claim 1 , wherein the controller is further configured to control the communication interface to return a first notification upon completion of writing the first metadata and the user data, the first notification including the logical address or identifier of the user data and the physical location of the nonvolatile memory.

8. The storage device according to claim 7 , wherein the controller is further configured to control the communication interface to return a second notification upon completion of transmitting the physical location of the nonvolatile memory, the second notification being different from the first notification.

9. A storage system comprising:

a storage device including a nonvolatile memory including a plurality of physical blocks, a communication interface, and a controller; and

a host connected to the communication interface of the storage device, and including a processor and a volatile memory in which mapping between a logical address or identifier of user data and a physical location of the nonvolatile memory is stored, wherein

the controller is configured to:

receive through the communication interface from the host, a first command and host data associated with the first command, the host data including user data to be stored and first metadata relating to the user data, the first metadata including at least the logical address or identifier of the user data and time stamp information;

in response to receiving the first command and the host data, write, into the nonvolatile memory, the received first metadata and the received user data;

receive through the communication interface from the host, a second command after writing the first metadata and the user data; and in response to receiving the second command, transmit a physical location of the nonvolatile memory in which the user data is written and the first metadata including at least the logical address or the identifier of the user data and the time stamp information.

10. The storage system according to claim 9 , wherein the time stamp indicates when the first command was issued.

11. The storage system according to claim 9 , wherein the controller receives the first command and then the host data associated with the first command.

12. The storage system according to claim 9 , wherein the first metadata also includes a size thereof and a size of the user data.

13. The storage system according to claim 9 , wherein the physical location indicates one or more of the plurality of physical blocks.

14. The storage system according to claim 9 , wherein the controller is further configured to:

generate second metadata relating to the received host data, the second metadata being different from the first metadata, the second metadata including metadata relating thereto, metadata relating to the user data, and metadata relating to the first metadata; and

write, in the nonvolatile memory, the generated second metadata, the received first metadata, and the received user data continuously in this order.

15. The storage system according to claim 9 , wherein the processor is configured to reconstruct the mapping based on the first metadata received through the communication interface.

16. A computing device connectable to a nonvolatile storage device, comprising:

a volatile memory; and

a processor configured to:

transmit host data, which include user data to be stored and first metadata relating to the user data, in association with a first command issued thereby, the first metadata including at least a logical address or identifier of the user data and time stamp information;

store, in the volatile memory, mapping that has been constructed, the mapping being between the logical address or the identifier of the user data and a physical location of the nonvolatile storage device in which the user data has been written;

issue a second command to the nonvolatile storage device when the mapping is lost from the volatile memory or when the mapping in the volatile memory is not accessible;

receive the physical location of the nonvolatile storage device in which the user data has been written and the first metadata including at least the logical address or the identifier of the user data and the time stamp information from the nonvolatile storage device, and

reconstruct the mapping that has been lost or has not been accessible based on the received physical location and the received first metadata.

17. The computing device according to claim 16 , wherein the time stamp indicates when the first command was issued.

18. The computing device according to claim 16 , wherein the first metadata also includes a size thereof and a size of the user data.

Assignments (3)
CHANGE OF NAME Recorded Dec 13, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 058376/0494 →
CHANGE OF NAME Recorded Dec 13, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 058495/0865 →
MERGER Recorded Dec 13, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 058495/0962 →
Continuity (2)
Continuation 15296841 · Oct 18, 2016
Related Publication 20210081315A1 · Mar 18, 2021