Semiconductor device
A semiconductor device ( 1 ) is manufactured which includes a SiC epitaxial layer ( 28 ), a plurality of transistor cells ( 18 ) that are formed in the SiC epitaxial layer ( 28 ) and that are subjected to ON/OFF control by a predetermined control voltage, a gate electrode ( 19 ) that faces a channel region ( 32 ) of the transistor cells ( 18 ) in which a channel is formed when the semiconductor device ( 1 ) is in an ON state, a gate metal ( 44 ) that is exposed at the topmost surface for electrical connection with the outside and that is electrically connected to the gate electrode ( 19 ) while being physically separated from the gate electrode ( 19 ), and a built-in resistor ( 21 ) that is made of polysilicon and that is disposed below the gate metal ( 44 ) so as to electrically connect the gate metal ( 44 ) and the gate electrode ( 19 ) together.
1. A semiconductor device comprising:
a semiconductor layer;
a plurality of cells that are formed in the semiconductor layer;
a control pad for electric connection for controlling the semiconductor device,
a pad peripheral portion formed around the control pad to surround the control pad continuously;
a built-in resistor that is disposed partly below the control pad and that is made of polysilicon, the built-in resistor electrically connecting the control pad with the pad peripheral portion; and
a plurality of source pads for electric connection,
wherein the control pad is isolated from the pad peripheral portion physically in a same layer so that a space is formed between the control pad and the pad peripheral portion, and the control pad is formed around the edge portion of the semiconductor device,
a connecting portion to which a connecting member is connected is selectively formed on a surface of the control pad, and
the built-in resistor is selectively disposed in a region that avoids the connecting portion in a plain view.
2. The semiconductor device according to claim 1 , wherein the connection portion occupies more than half of the area of the control pad in a plan view.
3. The semiconductor device according to claim 1 , further comprising a gate finger extending from the peripheral portion of the pad.
4. The semiconductor device according to claim 3 , wherein the gate finger extends in three directions from the peripheral portion of the control pad.
5. The semiconductor device according to claim 4 , wherein the gate finger has portions extending to the four corners of the semiconductor device.
6. The semiconductor device according to claim 5 , wherein a width of the gate finger is narrower than a width of the built-in resistor.
7. The semiconductor device according to claim 1 , wherein the built-in resistor has a rectangular shape in a plan view.
8. The semiconductor device according to claim 1 , wherein the control pad is made of a material containing aluminum.
9. The semiconductor device according to claim 8 , wherein the pad peripheral portion is made of a material containing aluminum.
10. The semiconductor device according to claim 9 , further comprising a plurality of source pads for electric connection,
wherein each of said source pads are made of a material containing aluminum.
11. The semiconductor device according to claim 1 , wherein semiconductor device has a rectangular shape in a plan view, and
the control pad is provided in the vicinity of the center of one side of the semiconductor device in a plan view.
12. The semiconductor device according to claim 1 , wherein the peripheral portion of the pad has the same thickness as the control pad.
13. The semiconductor device according to claim 1 , wherein the built-in resistor is disposed in a region partially below the control pad with an interlayer film selectively disposed between the built-in resistor and the control pad.
14. The semiconductor device according to claim 1 , wherein the connection portion is formed in a central portion of the control pad.
15. The semiconductor device according to claim 1 , wherein at least a part of the built-in resistor is disposed in a lower region of the control pad.
16. A semiconductor device comprising:
a semiconductor layer;
a plurality of cells that are formed in the semiconductor layer;
a control pad for electric connection for controlling the semiconductor device,
a pad peripheral portion formed around the control pad to surround the control pad continuously;
a built-in resistor that is disposed partly below the control pad and that is made of polysilicon, the built-in resistor connecting the control pad with the pad peripheral portion; and
a plurality of source pads for electric connection,
wherein the control pad is isolated from the pad peripheral portion physically in a same layer so that a space is formed between the control pad and the pad peripheral portion, and the control pad is formed around the edge portion of the semiconductor device,
a connecting portion to which a connecting member is connected is selectively formed on a surface of the control pad, and
the built-in resistor is selectively disposed in a region that avoids the connecting portion in a plain view.
17. The semiconductor device according to claim 16 , wherein the connection portion occupies more than half of the area of the control pad in a plan view.
18. The semiconductor device according to claim 16 , further comprising a gate finger extending from the peripheral portion of the pad.
19. The semiconductor device according to claim 18 , wherein the gate finger extends in three directions from the peripheral portion of the control pad.
20. The semiconductor device according to claim 19 , wherein the gate finger has portions extending to the four corners of the semiconductor device.