Drain side recess for back-side power rail device

1. A semiconductor transistor device, comprising:

a channel structure;

a gate structure wrapping around the channel structure;

a first source/drain epitaxial structure and a second source/drain epitaxial structure disposed on opposite endings of the channel structure, the second source/drain epitaxial structure having a concave bottom surface; and

a back-side source/drain contact disposed under the first source/drain epitaxial structure; and

a first dielectric liner disposed along a sidewall of the back-side source/drain contact.

2. The semiconductor transistor device of claim 1 , wherein the first source/drain epitaxial structure has a concave bottom surface contacting the back-side source/drain contact.

3. The semiconductor transistor device of claim 1 , further comprising a back-side dielectric cap disposed under the second source/drain epitaxial structure and extended under the gate structure.

4. The semiconductor transistor device of claim 3 , further comprising a second dielectric liner disposed between the first dielectric liner and the back-side dielectric cap and extended along and in direct contact with the concave bottom surface of the second source/drain epitaxial structure and a bottom surface of the gate structure.

5. The semiconductor transistor device of claim 3 , further comprising a middle isolation structure surrounding the gate structure, the first source/drain epitaxial structure, and the second source/drain epitaxial structure.

6. The semiconductor transistor device of claim 5 , further comprising a lower isolation structure disposed under the middle isolation structure and surrounding the back-side dielectric cap.

7. The semiconductor transistor device of claim 1 , wherein the channel structure comprises a stack of semiconductor nanowires.

8. The semiconductor transistor device of claim 1 , further comprises:

a front-side interconnect structure disposed over the gate structure and electrically connected to the gate structure through a gate contact; and

a back-side interconnect structure disposed under the first source/drain epitaxial structure and electrically connected to the first source/drain epitaxial structure through the back-side source/drain contact.

9. The semiconductor transistor device of claim 1 , further comprising an inner spacer separating with the gate structure from the first source/drain epitaxial structure and the second source/drain epitaxial structure.

10. The semiconductor transistor device of claim 1 , wherein the first dielectric liner directly contacts the sidewall of the back-side source/drain contact.

11. A semiconductor transistor device, comprising:

a channel structure;

a gate structure wrapping around the channel structure;

a first source/drain epitaxial structure and a second source/drain epitaxial structure disposed on opposite endings of the channel structure, the second source/drain epitaxial structure having a bottom surface locating higher than a bottom surface of the gate structure;

a gate contact disposed on the gate structure; and

a back-side source/drain contact disposed under and contacting the first source/drain epitaxial structure; and

a back-side dielectric cap disposed under and extended along the second source/drain epitaxial structure;

wherein the back-side dielectric cap laterally extends under and contacting the gate structure.

12. The semiconductor transistor device of claim 11 , wherein the bottom surface of the second source/drain epitaxial structure has a concave shape along a first direction from the first source/drain epitaxial structure to the second source/drain epitaxial structure and along a second direction perpendicular to the first direction.

13. The semiconductor transistor device of claim 11 , wherein the back-side source/drain contact has a top surface locating higher than the bottom surface of the gate structure.

14. The semiconductor transistor device of claim 11 , further comprising:

a first dielectric liner disposed between the back-side source/drain contact and the back-side dielectric cap.

15. The semiconductor transistor device of claim 11 , wherein the gate structure comprises:

a gate electrode; and

a gate dielectric between the gate electrode and the channel structure.

16. The semiconductor transistor device of claim 11 , wherein the channel structure comprises a stack of semiconductor nanowires.

17. The semiconductor transistor device of claim 11 , further comprising an inner spacer separating with the gate structure from the first source/drain epitaxial structure and the second source/drain epitaxial structure.

18. The semiconductor transistor device of claim 11 , wherein the back-side dielectric cap comprises SiO 2 , SiN, SiCN, SiOCN, Al 2 O 3 , AlON, ZrO 2 , HfO 2 , or combinations thereof.

19. The semiconductor transistor device of claim 14 , further comprising:

a second dielectric liner disposed between the first dielectric liner and the back-side dielectric cap and extended along the second source/drain epitaxial structure and the gate structure.

20. A semiconductor transistor device, comprising:

a channel structure comprising a plurality of semiconductor layers one stacked over another;

a metal gate structure disposed over the channel structure and separating the plurality of semiconductor layers;

inner spacers disposed on opposite sides of the plurality of semiconductor layers;

a first source/drain epitaxial structure and a second source/drain epitaxial structure disposed on opposite endings of the channel structure, the second source/drain epitaxial structure having a recessed bottom surface with a concave shape;

a back-side source/drain contact disposed under and contacting the first source/drain epitaxial structure; and

a back-side dielectric cap disposed at a bottom surface of the metal gate structure and the recessed bottom surface of the second source/drain epitaxial structure.