IP Library Granted Patent US 12,002,822
Granted Patent B2
US 12,002,822 · App. 17/134,809 · Granted Jun 4, 2024

Metal-oxide-semiconductor capacitor based passive amplifier

Inventor: Manuel H. Innocent (Wezemaal, BE)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L27/14609H03M1/1245H03M1/466H04N25/59H04N25/75H04N25/77
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Quick Facts
Patent No.
US 12,002,822
App. No.
17/134,809
Granted
Jun 4, 2024
Kind
B2
Abstract

A passive amplifier is provided that includes an input sampling switch, a sampling capacitance, and metal-oxide-semiconductor capacitor devices. An input signal may be sampled onto the sampling capacitance by turning on the input sampling switch while the metal-oxide-semiconductor capacitors are activated. After the sampling phase, the metal-oxide-semiconductor capacitors are deactivated to provide a voltage gain. The voltage gain can be conditionally applied depending on the signal level of the sampled input.

Claims (46)

1. An image sensor, comprising:

an image sensor pixel;

a column line configured to receive a signal from the image sensor pixel; and

a passive amplifier circuit comprising:

an input port configured to receive the signal from the column line;

an output port;

a sampling switch having a first terminal coupled to the input port and having a second terminal coupled to the output port; and

a metal-oxide-semiconductor capacitor having a gate terminal configured to receive a control signal and having source-drain terminals coupled to the output port.

2. The image sensor of claim 1 , wherein the passive amplifier circuit further comprises:

a capacitor having a first terminal coupled to the output port and having a second terminal configured to receive a reference voltage; and

an additional metal-oxide semiconductor capacitor having a gate terminal configured to receive an inverted version of the control signal and having source-drain terminals coupled to the output port.

3. The image sensor of claim 2 , wherein the metal-oxide-semiconductor capacitor comprises an n-type metal-oxide-semiconductor capacitor and wherein the additional metal-oxide-semiconductor capacitor comprises a p-type metal-oxide-semiconductor capacitor.

4. The image sensor of claim 2 , wherein the metal-oxide-semiconductor capacitor and the additional metal-oxide-semiconductor capacitor are activated during a charge sampling phase and are deactivated during an amplification phase.

5. The image sensor of claim 4 , wherein the reference voltage has a given voltage level during the charge sampling phase and has the given voltage level during the amplification phase.

6. The image sensor of claim 4 , wherein the reference voltage has a first voltage level during the charge sampling phase and has a second voltage level, different than the first voltage level, during the amplification phase.

7. The image sensor of claim 2 , wherein the passive amplifier circuit further comprising:

a comparator having an input coupled to the first terminal of the capacitor and an output on which the control signal is generated.

8. The image sensor of claim 7 , wherein the comparator is configured to deassert the control signal when the signal at the input port is within a predetermined voltage range.

9. An amplifier, comprising:

an input port;

an output port;

a sampling switch having a first terminal coupled to the input port and having a second terminal coupled to the output port; and

a metal-oxide-semiconductor capacitor having source-drain terminals coupled to the output port and having a gate terminal configured to receive a control signal.

10. The amplifier of claim 9 , further comprising:

an additional metal-oxide-semiconductor capacitor having source-drain terminals coupled to the output port and having a gate terminal configured to receive an inverted version of the control signal.

11. The amplifier of claim 10 , further comprising:

a capacitor having a first terminal coupled to the output port and having a second terminal configured to receive a reference voltage.

12. The amplifier of claim 11 , wherein:

the control signal is driven high during a charge sampling operation;

the control signal is driven low during an amplification operation;

the reference voltage has a first voltage level during the charge sampling operation; and

the reference voltage has the first voltage level or a second voltage level, different than the first voltage level, during the amplification operation.

13. The amplifier of claim 11 , wherein:

the control signal is driven high during a sampling operation; and

the control signal is driven low during an amplification operation.

14. The amplifier of claim 11 , wherein:

the reference voltage has a first voltage level during the sampling operation; and

the reference voltage has the first voltage level or a second voltage level, different than the first voltage level, during the amplification operation.

15. The amplifier of claim 10 , wherein the metal-oxide-semiconductor capacitor comprises an n-type metal-oxide-semiconductor capacitor and wherein the additional metal-oxide-semiconductor capacitor comprises a p-type metal-oxide-semiconductor capacitor.

16. The amplifier of claim 10 , wherein the metal-oxide-semiconductor capacitor and the additional metal-oxide-semiconductor capacitor are activated during a first phase and are deactivated during a second phase different than the first phase.

17. The amplifier of claim 16 , wherein the first phase comprises a sampling phase and wherein the second phase comprises an amplification phase.

18. The amplifier of claim 9 , further comprising:

a comparator having an input coupled to the second terminal of the sampling switch and an output at which the control signal is produced.

19. The amplifier of claim 18 , wherein the comparator is configured to deassert the control signal when a signal at the input port is within a predetermined voltage range.

20. The amplifier of claim 18 , further comprising:

an inverter having an input coupled to the output of the comparator and to the gate terminal of the metal-oxide-semiconductor capacitor.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL 055315, FRAME 0350 Recorded Aug 17, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064618/0881 →
SECURITY INTEREST Recorded Feb 17, 2021
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 055315/0350 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 28, 2020
From: INNOCENT, MANUEL H.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 054753/0267 →