IP Library › Granted Patent US 11,594,563
Granted Patent B2
US 11,594,563 · App. 17/144,947 · Granted Feb 28, 2023

Image sensor having improved dicing properties

Inventors: Atsushi Yamamoto (Kanagawa, JP); Shinji Miyazawa (Kanagawa, JP); Yutaka Ooka (Kanagawa, JP); Kensaku Maeda (Kanagawa, JP); Yusuke Moriya (Kanagawa, JP); Naoki Ogawa (Kumamoto, JP); Nobutoshi Fujii (Kanagawa, JP); Shunsuke Furuse (Kanagawa, JP); Masaya Nagata (Kanagawa, JP); Yuichi Yamamoto (Kanagawa, JP)
Assignee: SONY CORPORATION
H01L27/14618H01L27/1462H01L27/1464H01L27/14621H01L27/14623H01L27/14627H01L27/14632H01L27/14636H01L27/14645H01L27/14685H01L27/14687H01L31/0203H01L2224/11
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Quick Facts
Patent No.
US 11,594,563
App. No.
17/144,947
Granted
Feb 28, 2023
Kind
B2
Abstract

The present technology relates to techniques of preventing intrusion of moisture into a chip. Various illustrative embodiments include image sensors that include: a substrate; a plurality of layers stacked on the substrate; the plurality of layers including a photodiode layer having a plurality of photodiodes formed on a surface of the photodiode layer; the plurality of layers including at least one layer having a groove formed such that a portion of the at least one layer is excavated; and a transparent resin layer formed above the photodiode layer and formed in the groove. The present technology can be applied to, for example, an image sensor.

Claims (44)

1. A chip comprising:

a support substrate;

a plurality of layers stacked on the support substrate, the plurality of layers including:

an interconnection layer arranged on the support substrate; and

a silicon substrate arranged on the interconnection layer and including a plurality of photodiodes;

a first resin region including resin material and formed above the plurality of layers; and

a second resin region including resin material and formed on a side surface of the interconnection layer and on a side surface of the support substrate.

2. The chip according to claim 1 , further comprising:

a solder resist and a connection terminal formed below the support substrate.

3. The chip according to claim 1 , further comprising:

a through silicon via formed in the support substrate.

4. The chip according to claim 1 , wherein the plurality of layers further include:

a planarization film formed on the silicon substrate;

a light shielding film formed in the planarization film; and

a color filter layer formed on the planarization film.

5. The chip according to claim 4 , wherein the plurality of layers further include a microlens layer disposed above the color filter layer.

6. An image sensor, comprising:

a substrate;

a plurality of layers stacked on the substrate, the plurality of layers including:

a photodiode layer including a plurality of photodiodes formed therein; and

at least one layer having a groove formed therein such that a portion of the at least one layer is excavated, the groove being disposed outside the plurality of photodiodes;

an adhesive layer formed above the photodiode layer;

a passivation film formed in the groove; and

a cover glass above the plurality of photodiodes and on the adhesive layer.

7. The image sensor according to claim 6 , wherein the adhesive layer is formed above the groove.

8. The image sensor according to claim 6 , wherein the plurality of layers further includes an interconnection layer disposed below the photodiode layer.

9. The image sensor according to claim 6 , wherein the groove includes a portion of the photodiode layer such that the portion of the photodiode layer is excavated.

10. The image sensor according to claim 6 , wherein the adhesive layer is further formed in the groove.

11. The image sensor according to claim 6 , wherein the groove forms a pad opening portion.

12. The image sensor according to claim 11 , further comprising a hydrophobic film formed in the pad opening portion.

13. The image sensor according to claim 11 , further comprising a passivation film that covers an inner wall of the pad opening portion.

14. The image sensor according to claim 13 , wherein the passivation film comes into contact with a top surface of an electrode pad formed at a bottom of the pad opening portion.

15. An image sensor, comprising:

a substrate;

a plurality of layers stacked on the substrate, the plurality of layers including:

a photodiode layer including a plurality of photodiodes formed therein; and

at least one layer having a groove formed therein such that a portion of the at least one layer is excavated, the groove being disposed outside the plurality of photodiodes;

an adhesive layer formed above the photodiode layer; and

a cover glass above the plurality of photodiodes and on the adhesive layer wherein:

the plurality of layers further includes a planarization film formed above the photodiode layer; and

the groove is formed such that a portion of the planarization film is excavated.

16. The image sensor according to claim 15 , wherein:

the plurality of layers further includes a color filter layer formed above the planarization film; and

the groove is formed such that a portion of the color filter layer is excavated.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 9, 2022
From: YAMAMOTO, ATSUSHI; MIYAZAWA, SHINJI; OOKA, YUTAKA; MAEDA, KENSAKU; MORIYA, YUSUKE; OGAWA, NAOKI; FUJII, NOBUTOSHI; FURUSE, SHUNSUKE; NAGATA, MASAYA; YAMAMOTO, YUICHI
To: SONY CORPORATION
Reel/Frame 060149/0962 →
Priority Claims (2)
JP 2014-012628 · Jan 27, 2014 · national
JP 2014-258939 · Dec 22, 2014 · national
Continuity (5)
Continuation 16807049 · Mar 2, 2020
Continuation 16045973 · Jul 26, 2018
Continuation 15476629 · Mar 31, 2017
Continuation 15111003
Related Publication 20210305300A1 · Sep 30, 2021
Cited By (1)
US 12,317,638