IP Library › Granted Patent US 11,824,063
Granted Patent B2
US 11,824,063 · App. 17/148,653 · Granted Nov 21, 2023

Method for producing semiconductor device

Inventors: Akihiro Hanada (Tokyo, JP); Toshihide Jinnai (Tokyo, JP)
Assignee: Japan Display Inc.
H01L27/1229H01L27/1225H01L29/66969H01L29/7869
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Quick Facts
Patent No.
US 11,824,063
App. No.
17/148,653
Granted
Nov 21, 2023
Kind
B2
Abstract

An object of the present invention is to provide a technology using which, in a thin film transistor using oxide semiconductor, the resistance of a channel region of the oxide semiconductor is made high, and at the same time the resistances of a source region and a drain region of the oxide semiconductor are made low. There is provided a semiconductor device including: a thin film transistor including oxide semiconductor, the oxide semiconductor including a channel region, a drain region, and a source region; a gate insulating film formed on the channel region; an aluminum oxide film formed on the gate insulating film; and a gate electrode formed on the aluminum oxide film, wherein the aluminum oxide film has a region that covers neither the drain region nor the source region in a plane view.

Claims (13)

1. A method of manufacturing a semiconductor device including a thin film transistor having a semiconductor layer of oxide semiconductor with a channel region, a drain region, and a source region, the method comprising:

forming the semiconductor layer on a substrate;

forming a gate insulating film so that the gate insulating film covers the semiconductor layer;

forming a block layer including an opening over the channel region of the semiconductor layer on the gate insulating film;

forming an aluminum oxide film on the block layer and on a portion of the gate insulating film exposed from the opening and supplying oxygen through the opening to the channel region of the semiconductor layer;

forming a gate electrode on the aluminum oxide film; and

selectively patterning the gate electrode, the aluminum oxide film, and the block layer so that an upper part of the channel region of the semiconductor layer is covered,

wherein the patterning is executed such that portions of the block layer are left behind at both edges of the aluminum oxide film.

2. The method of manufacturing a semiconductor device according to claim 1 further comprising:

giving electrical conductivity to the drain region and the source region of the semiconductor layer through an ion implantation using the selectively patterned gate electrode as a mask;

forming an insulating film so as to cover the selectively patterned gate electrode, aluminum oxide film, and block layers;

forming contact holes in the insulating film and the gate insulating film so that the drain region and the source region are exposed; and

forming wirings in the contact holes.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2025
From: JAPAN DISPLAY INC.
To: MAGNOLIA WHITE CORPORATION
Reel/Frame 072130/0313 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 14, 2021
From: HANADA, AKIHIRO; JINNAI, TOSHIHIDE
To: JAPAN DISPLAY INC.
Reel/Frame 054915/0597 →
Priority Claims (1)
JP 2018-139126 · Jul 25, 2018 · national
Continuity (2)
Continuation PCTJP2019025099 · Jun 25, 2019
Related Publication 20210134848A1 · May 6, 2021
Cited By (1)
US 12,191,316