IP Library Granted Patent US 12,113,438
Granted Patent B2
US 12,113,438 · App. 17/163,323 · Granted Oct 8, 2024

Protection of switched capacitor power converter

Inventors: Aichen Low (Cambridge, MA); David M. Giuliano (Brookline, MA); Gregory Szczeszynski (Hollis, NH); Jeff Summit (Jefferson, MA); Oscar Blyde (Melrose, MA)
Assignee: pSemi Corporation
H02M3/07H02M1/32H02M3/073H02M3/075
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Quick Facts
Patent No.
US 12,113,438
App. No.
17/163,323
Granted
Oct 8, 2024
Kind
B2
Abstract

Transient or fault conditions for a switched capacitor power converter are detected by measuring one or more of internal voltages and/or currents associated with switching elements (e.g., transistors) or phase nodes, or voltages or currents at terminals of the converter, and based on these measurements detect that a condition has occurred when the measurements deviate from a predetermined range. Upon detection of the condition fault control circuitry alters operation of the converter, for example, by using a high voltage switch to electrically disconnect at least some of the switching elements from one or more terminals of the converter, or by altering timing characteristics of the phase signals.

Claims (96)

1. An integrated circuit (IC) comprising:

a fault detector configured to sense a voltage and/or current at an internal node of a voltage converter, the voltage converter comprising a plurality of switches connected in series between an input terminal and an output terminal, the plurality of switches operable to selectively charge and/or discharge one or more of a plurality of capacitors in successive stages of the voltage converter in accordance with a switching configuration to convert an input voltage received at the input terminal to an output voltage at the output terminal;

wherein the internal node is disposed between a first pair of switches of the plurality of switches; and

wherein the fault detector is configured to detect one or more fault events of the switching configuration at the internal node during operation of the voltage converter and to generate one or more fault signals with respect to the one or more detected fault events.

2. The IC of claim 1 , wherein at least some of the plurality of switches are operable to form an electrical connection of at least some of the capacitors to respective alternative voltages in successive stages of the voltage converter; and

wherein the respective alternate voltages to comprise at least one of the following: ground or an output voltage level.

3. The IC of claim 1 , wherein operation of the successive stages of the voltage converter comprise two alternating clocked phases of operation of the voltage converter to be driven in a non-overlapping manner.

4. The IC of claim 1 , wherein the one or more fault events comprise at least one of the following to be detected by the fault detector: a voltage above an overvoltage threshold, a voltage below an undervoltage threshold and/or a current above an overcurrent threshold; and wherein the overvoltage threshold, the undervoltage threshold and/or the overcurrent threshold comprise programmable settings.

5. The IC of claim 1

wherein the internal node is disposed between successive stages of the voltage converter, each stage of the voltage converter comprising at least one of the plurality of capacitors; and/or

wherein the internal node is directly connected to a capacitor of one of the successive stages of the voltage converter.

6. The IC of claim 4 , wherein the fault detector is directly connected to the internal node; and/or

wherein the fault detector comprises a voltage comparator and/or a current comparator to detect at least one of the following: the voltage above the overvoltage threshold, the voltage below the undervoltage threshold and/or the current above the overcurrent threshold.

7. The IC of claim 6 , wherein the fault detector includes a logical fault indicator to generate the one or more fault signals based, at least in part, on one or more signals from the voltage comparator and/or the current comparator; and

wherein at least one of the one or more fault signals comprises a latched fault signal.

8. The IC of claim 1 ,

wherein the internal node is one of a plurality of internal nodes, each of the plurality of internal nodes disposed between a respective pair of switches of the plurality of switches; and

wherein the fault detector is configured to detect the one or more fault events of the switching configuration at the plurality of internal nodes during operation of the voltage converter and generate one or more fault signals with respect to the one or more to be detected fault events.

9. The IC of claim 1 further comprising the plurality of switches.

10. The IC of claim 1 , wherein the fault detector is further configured to alter operation of the voltage converter in response to detecting the one or more fault events of the switching configuration; and/or

wherein the one or more fault events are detected from one or more of:

a voltage across one of the plurality of switches;

a current through one of the plurality of switches;

voltage at a terminal of a capacitor of the plurality of capacitors;

voltage and/or current at an output of a phase node of the voltage converter.

11. A fault detector comprising:

at least one terminal to be coupled to a charge pump, the charge pump comprising a switching configuration comprising a plurality of switches connected in series between an input terminal and an output terminal, and a plurality of capacitors, wherein the charge pump is configured to operate in successive stages of operation during which at least some of the plurality of switches are configured to electrically connect at least some of the plurality of capacitors to respective voltages to convert an input voltage received at the input terminal to an output voltage at the output terminal,

wherein the fault detector is configured to detect a fault event at an internal node disposed between a first pair of switches of the plurality of switches within the switching configuration of the charge pump,

wherein the fault detector is configured to, in response to detecting the fault event at the internal node, generate a fault signal.

12. The fault detector of claim 11 , wherein the fault detector is further configured to alter operation of the charge pump in response to detecting the fault event within the switching configuration.

13. The fault detector of claim 12 , wherein altering operation of the charge pump in response to detecting the fault event within the switching configuration comprises electrically disconnecting at least some of the plurality of switches in the charge pump.

14. The fault detector of claim 12 , wherein altering operation of the charge pump in response to detecting the fault event within the switching configuration comprises altering timing characteristics of the successive stages of operation, suspending operation of the charge pump, and/or limiting a current through the charge pump.

15. The fault detector of claim 12 ,

wherein the internal node is disposed between successive stages of the charge pump, each stage of the charge pump comprising at least one of the plurality of capacitors; and/or

wherein the internal node is directly connected to a capacitor of one of the successive stages of the charge pump.

16. The fault detector of claim 12 ,

wherein the fault detector is directed connected to the internal node; and/or

wherein the fault detector comprises a voltage comparator and/or a current comparator to detect at least one of the following: a voltage above an overvoltage threshold, a voltage below an undervoltage threshold and/or a current above an overcurrent threshold.

17. The fault detector of claim 11 , wherein:

at least one of the plurality of switches comprises a switching transistor; and

detecting the fault event within the switching configuration of the charge pump comprises detecting (i) a voltage across a source and a drain of the switching transistor and/or (ii) a current through the switching transistor.

18. The fault detector of claim 11 , wherein detecting the fault event within the switching configuration of the charge pump comprises one of:

detecting the fault event at one or more of the plurality of switches in the switching configuration of the charge pump, and

detecting the fault event at one of the plurality of capacitors in the switching configuration of the charge pump.

19. The fault detector of claim 11 , wherein detecting the fault event at one of the plurality of capacitors in the switching configuration of the charge pump comprises detecting that a terminal of the capacitor is shorted to one of ground, an input voltage of the charge pump, an output voltage of the charge pump, and a terminal of another capacitor of the plurality of capacitors.

20. The fault detector of claim 11 , wherein:

the charge pump further comprises a phase node; and

detecting the fault event within the switching configuration of the charge pump comprises detecting the fault event at a phase node in the switching configuration of the charge pump.

21. An integrated circuit (IC) comprising:

a fault detector configured to sense a voltage and/or current at an internal node of a voltage converter, the voltage converter comprising a plurality of switches connected in series between an input terminal and an output terminal, the plurality of switches operable to selectively charge and/or discharge one or more of a plurality of capacitors in successive stages of the voltage converter in accordance with a switching configuration to convert an input voltage received at the input terminal to an output voltage at the output terminal;

wherein the fault detector is configured to detect one or more fault events of the switching configuration at the internal node during operation of the voltage converter and generate one or more fault signals with respect to the one or more to be detected fault events, and

wherein the internal node is directly connected to at least two of the switches and one of the capacitors.

22. The IC of claim 21 , wherein at least some of the plurality of switches are operable to form an electrical connection of at least some of the capacitors to respective alternative voltages in successive stages of the voltage converter; and

wherein the respective alternate voltages to comprise at least one of the following: ground or an output voltage level.

23. The IC of claim 21 , wherein operation of the successive stages of the voltage converter comprises two alternating clocked phases of operation of the voltage converter to be driven in a non-overlapping manner.

24. The IC of claim 21 , wherein the one or more fault events comprises at least one of the following to be detected by the fault detector: a voltage above an overvoltage threshold, a voltage below an undervoltage threshold and/or a current above an overcurrent threshold; and wherein the overvoltage threshold, the undervoltage threshold and/or the overcurrent threshold comprise programmable settings.

25. The IC of claim 21 ,

wherein the internal node is disposed between successive stages of the voltage converter, each stage of the voltage converter comprising at least one of the plurality of capacitors; and/or

wherein the internal node is directly connected to a capacitor of one of the successive stages of the voltage converter.

26. The IC of claim 24 , wherein the fault detector is directly connected to the internal node; and/or wherein the fault detector comprises a voltage comparator and/or a current comparator to detect at least one of the following: the voltage above the overvoltage threshold, the voltage below the undervoltage threshold and/or the current above the overcurrent threshold.

27. The IC of claim 26 , wherein the fault detector includes a logical fault indicator to generate the one or more fault signals based, at least in part, on one or more signals from the voltage comparator and/or the current comparator; and/or

wherein at least one of the one or more fault signals to be generated to comprise a latched fault signal.

28. The IC of claim 27 ,

wherein the internal node is one of a plurality of internal nodes, each of the plurality of internal nodes disposed between a respective pair of switches of the plurality of switches; and

wherein the fault detector is configured to detect the one or more fault events of the switching configuration one or more of the plurality of internal nodes during operation of the voltage converter and generate one or more fault signals with respect to the one or more to be detected fault events.

29. The IC of claim 21 further comprising the plurality of switches.

30. The IC of claim 21 , wherein the fault detector is further configured to alter operation of the voltage converter in response to detecting the one or more fault events of the switching configuration; and/or

wherein the one or more fault events are detected from one or more of:

a voltage across one of the plurality of switches;

a current through one of the plurality of switches;

voltage at a terminal of a capacitor of the plurality of capacitors;

voltage and/or current at an output of a phase node of the voltage converter.

31. A fault detector comprising:

at least one terminal to be coupled to a charge pump, the charge pump comprising a switching configuration comprising a plurality of switches connected in series between an input terminal and an output terminal, and a plurality of capacitors, wherein the charge pump is configured to operate in successive stages of operation during which at least some of the plurality of switches are configured to electrically connect at least some of the plurality of capacitors to respective voltages to convert an input voltage received at the input terminal to an output voltage at the output terminal,

wherein the fault detector is configured to detect a fault event at an internal node disposed between a first pair of switches of the plurality of switches within the switching configuration of the charge pump and

directly connected to one of the capacitors, and

wherein the fault detector is configured to, in response to detecting the fault event at the internal node, generate a fault signal.

32. The fault detector of claim 31 , wherein the fault detector is further configured to alter operation of the charge pump in response to detecting the fault event within the switching configuration.

33. The fault detector of claim 32 , wherein altering operation of the charge pump in response to detecting the fault event within the switching configuration comprises electrically disconnecting at least some of the plurality of switches in the charge pump.

34. The fault detector of claim 32 , wherein altering operation of the charge pump in response to detecting the fault event within the switching configuration comprises altering timing characteristics of the successive stages of operation, suspending operation of the charge pump, and/or limiting a current through the charge pump.

35. The fault detector of claim 32

wherein the internal node is disposed between successive stages of the charge pump, each stage of the charge pump comprising at least one of the plurality of capacitors; and/or

wherein the internal node is directly connected to a capacitor of one of the successive stages of the charge pump.

36. The fault detector of claim 32

wherein the fault detector is directed connected to the internal node; and/or

wherein the fault detector comprises a voltage comparator and/or a current comparator to detect at least one of the following: a voltage above an overvoltage threshold, a voltage below an undervoltage threshold and/or a current above an overcurrent threshold.

37. The fault detector of claim 31 , wherein:

at least one of the plurality of switches comprises a switching transistor; and

detecting the fault event within the switching configuration of the charge pump comprises detecting (i) a voltage across a source and a drain of the switching transistor and/or (ii) a current through the switching transistor.

38. The fault detector of claim 31 , wherein detecting the fault event within the switching configuration of the charge pump comprises one of:

detecting the fault event at one or more of the plurality of switches in the switching configuration of the charge pump, and

detecting the fault event at one of the plurality of capacitors in the switching configuration of the charge pump.

39. The fault detector of claim 31 , wherein detecting the fault event at one of the plurality of capacitors in the switching configuration of the charge pump comprises detecting that a terminal of the capacitor is shorted to one of ground, an input voltage of the charge pump, an output voltage of the charge pump, and a terminal of another capacitor of the plurality of capacitors.

40. The fault detector of claim 31 , wherein:

the charge pump further comprises a phase node; and

detecting the fault event within the switching configuration of the charge pump comprises detecting the fault event at a phase node in the switching configuration of the charge pump.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 6, 2023
From: BLYDE, OSCAR
To: ARCTIC SAND TECHNOLOGIES, INC
Reel/Frame 064175/0281 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2021
From: LOW, AICHEN; GIULIANO, DAVID M.; SZCZESZYNSKI, GREGORY; SUMMIT, JEFF
To: ARCTIC SAND TECHNOLOGIES, INC.
Reel/Frame 055870/0381 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2021
From: ARCTIC SAND TECHNOLOGIES, INC.
To: PEREGRINE SEMICONDUCTOR CORPORATION
Reel/Frame 055870/0496 →
CHANGE OF NAME Recorded Apr 8, 2021
From: PEREGRINE SEMICONDUCTOR CORPORATION
To: PSEMI CORPORATION
Reel/Frame 055877/0483 →
Continuity (5)
Division 16850991 · Apr 16, 2020
Continuation 15719929 · Sep 29, 2017
Continuation 14776939
Continuation 13838681 · Mar 15, 2013
Related Publication 20210152084A1 · May 20, 2021
Cited By (1)
US 12,700,800