IP Library › Granted Patent US 11,710,675
Granted Patent B2
US 11,710,675 · App. 17/177,997 · Granted Jul 25, 2023

Package structure and method for manufacturing the same

Inventor: Hsu-Nan Fang (Kaohsiung, TW)
Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
H01L23/3142H01L21/4882H01L21/565H01L23/367H01L23/373H01L24/13H01L24/20H01L2224/13026H01L2224/2101H01L2224/214H01L2924/3511
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Quick Facts
Patent No.
US 11,710,675
App. No.
17/177,997
Granted
Jul 25, 2023
Kind
B2
Abstract

A package structure and a method for manufacturing the same are provided. The package structure includes an electronic device, a heat spreader, an intermediate layer and an encapsulant. The electronic device includes a plurality of electrical contacts. The intermediate layer is interposed between the electronic device and the heat spreader. The intermediate layer includes a sintered material. The encapsulant encapsulates the electronic device. A surface of the encapsulant is substantially coplanar with a plurality of surfaces of the electrical contacts.

Claims (26)

1. A package structure, comprising:

an electronic device;

a heat spreader;

an intermediate layer interposed between the electronic device and the heat spreader, wherein the intermediate layer includes a sintered material, wherein the intermediate layer is a thermal interface material; and

an encapsulant encapsulating the electronic device, wherein the electronic device includes a plurality of electrical contacts, and a surface of the encapsulant is substantially coplanar with a plurality of surfaces of the electrical contacts.

2. The package structure of claim 1 , further comprising a bonding promoter interposed between the electronic device and the intermediate layer.

3. The package structure of claim 2 , further comprising a plurality of intermetallic compounds (IMCs) disposed at an interface between the bonding promoter and the intermediate material, wherein the intermediate layer includes a plurality of metal particles and the bonding promoter comprises a metal layer.

4. The package structure of claim 1 , wherein the encapsulant encapsulates the intermediate layer.

5. The package structure of claim 1 , wherein the electrical contacts include bumps or pillars.

6. The package structure of claim 1 , wherein a Young's modulus of the intermediate layer is greater than 0.3 GPa.

7. The package structure of claim 1 , wherein a thermal conductivity of the intermediate layer is greater than 10 W/K.

8. A package structure, comprising:

an electronic device;

a heat spreader;

an intermediate layer interposed between the electronic device and the heat spreader, wherein the intermediate layer includes a sintered material; and

an encapsulant encapsulating the electronic device, wherein a portion of the electronic device is embedded in the intermediate layer.

9. The package structure of claim 8 , wherein a portion of the intermediate layer is in contact with a portion of a lateral side surface of the electronic device.

10. A package structure, comprising:

a first electronic device;

a second electronic device;

a reinforcement layer 11 covering the first electronic device, the second electronic device and a gap between the first electronic device and the second electronic device, wherein the reinforcement layer includes a sintered material; and

a wiring structure electrically connected to the first electronic device and the second electronic device.

11. The package structure of claim 10 , further comprising a heat spreader, wherein the reinforcement layer is attached to the heat spreader.

12. The package structure of claim 10 , wherein the reinforcement layer includes a thermal interface material and is in contact with the first electronic device and the second electronic device.

13. The package structure of claim 12 , wherein the reinforcement layer is in contact with a portion of a lateral side surface of the first electronic device and a portion of a lateral side surface of the second electronic device.

14. The package structure of claim 10 , further comprising an encapsulant encapsulating the first electronic device and the second electronic device, wherein the first electronic device includes a plurality of first electrical contacts, the second electronic device includes a plurality of second electrical contacts, and a surface of the encapsulant is substantially coplanar with a plurality of surfaces of the first electrical contacts and a plurality of surfaces of the second electrical contacts.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2021
From: FANG, HSU-NAN
To: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Reel/Frame 055300/0067 →
Continuity (1)
Related Publication 20220262697A1 · Aug 18, 2022
Cited By (2)
US 12,580,126 US 12,614,677