Interconnect structure with redundant electrical connectors and associated systems and methods
Semiconductor die assemblies having interconnect structures with redundant electrical connectors are disclosed herein. In one embodiment, a semiconductor die assembly includes a first semiconductor die, a second semiconductor die, and an interconnect structure between the first and the second semiconductor dies. The interconnect structure includes a first conductive film coupled to the first semiconductor die and a second conductive film coupled to the second semiconductor die. The interconnect structure further includes a plurality of redundant electrical connectors extending between the first and second conductive films and electrically coupled to one another via the first conductive film.
1. A semiconductor device, comprising:
a semiconductor substrate;
a plurality of through-substrate vias (TSVs) extending through the semiconductor substrate;
a conductive trace disposed at a surface of the semiconductor substrate and electrically coupled to the plurality of TSVs; and
a plurality of redundant electrical connectors electrically coupled to the conductive trace.
2. The semiconductor device of claim 1 , wherein the redundant electrical connectors extend away from the conductive trace in a first direction and the TSVs extend away from the conductive trace in a second direction generally opposite to the first direction.
3. The semiconductor device of claim 1 , further comprising:
a substrate contact coupled to a portion of the conductive trace and positioned directly between the conductive trace and at least one TSV of the plurality.
4. The semiconductor device of claim 1 , wherein the conductive trace is a first conductive trace, and the surface is a first surface of the semiconductor substrate, wherein the plurality of TSVs extend from the first surface to a second surface of the semiconductor substrate opposite to the first surface, the semiconductor device further comprising:
a second conductive trace disposed at the second surface and electrically coupled to the plurality of TSVs; and
a plurality of conductive bond pads electrically coupled to the second conductive trace.
5. The semiconductor device of claim 4 , wherein the redundant electrical connectors coupled to the first conductive trace extend away from the semiconductor substrate in a first direction and the conductive bond pads coupled to the second conductive trace extend away from the semiconductor substrate in a second direction generally opposite to the first direction.
6. The semiconductor device of claim 1 , further comprising:
a dielectric material over the surface of the semiconductor substrate, wherein the conductive trace extends at least partially through the dielectric material.
7. The semiconductor device of claim 6 , wherein the dielectric material includes a plurality of openings exposing portions of the conductive trace, wherein the redundant electrical connectors are formed in the openings.
8. The semiconductor device of claim 1 , wherein the plurality of redundant electrical connectors extend from the conductive trace and through a portion of a dielectric material disposed over the surface of the semiconductor substrate.
9. The semiconductor device of claim 1 , wherein each of the redundant electrical connectors includes:
a conductive pillar coupled to the conductive trace, and
a conductive bond material bonded to the conductive pillar.
10. The semiconductor device of claim 9 , wherein the conductive pillar comprises copper and the bond material comprises a solder material.
11. The semiconductor device of claim 9 , wherein the conductive pillar includes an end portion, and wherein the conductive bond material and conductive pillar form a conductive joint at the end portion.
12. The semiconductor device of claim 9 , wherein the conductive pillar includes generally vertical sidewalls and a barrier and/or seed material covering at least a portion of the sidewalls.
13. A semiconductor die assembly, comprising:
a first semiconductor die including a plurality of through-substrate vias (TSVs) and a first conductive trace disposed at a first surface of the first semiconductor die, the first conductive trace electrically coupled to the plurality of TSVs;
a second semiconductor die including a second conductive trace disposed at a second surface of the second semiconductor die; and
a plurality of redundant electrical connectors electrically coupling the first conductive trace to the second conductive trace.
14. The semiconductor die assembly of claim 13 , wherein the plurality of TSVs is a first plurality of TSVs, and wherein the second semiconductor die includes a second plurality of TSVs, the second conductive trace electrically coupled to the second plurality of TSVs.
15. The semiconductor die assembly of claim 14 , wherein:
the first conductive trace is electrically coupled to at least one TSV of the first plurality through a substrate contact positioned directly therebetween; and
the second conductive trace is directly connected to at least one TSV of the second plurality.
16. The semiconductor die assembly of claim 13 , wherein each of the redundant electrical connectors includes:
a conductive pillar coupled to the first conductive trace;
a bond pad coupled to the second conductive trace; and
a conductive bond material located between the conductive pillar and the bond pad.
17. The semiconductor die assembly of claim 16 , wherein the conductive pillar and the raised bond pad comprise copper, and the bond material comprises a solder material.
18. The semiconductor die assembly of claim 16 , wherein the conductive pillar includes an end portion, and wherein the conductive bond material forms a conductive joint coupling the bond pad to the end portion of the conductive pillar.
19. The semiconductor die assembly of claim 16 , wherein the conductive pillar and the bond pad include generally vertical sidewalk respectively, at least a portion of the sidewalls covered by a barrier and/or seed material.
20. The semiconductor die assembly of claim 13 , wherein:
the first semiconductor die is a first logic die or a first memory die; and
the second semiconductor die is a second logic die or a second memory die.